+++ /dev/null
-* Freescale General-Purpose Media Interface (GPMI)
-
-The GPMI nand controller provides an interface to control the
-NAND flash chips.
-
-Required properties:
- - compatible : should be "fsl,<chip>-gpmi-nand", chip can be:
- * imx23
- * imx28
- * imx6q
- * imx6sx
- * imx7d
- - reg : should contain registers location and length for gpmi and bch.
- - reg-names: Should contain the reg names "gpmi-nand" and "bch"
- - interrupts : BCH interrupt number.
- - interrupt-names : Should be "bch".
- - dmas: DMA specifier, consisting of a phandle to DMA controller node
- and GPMI DMA channel ID.
- Refer to dma.txt and fsl-mxs-dma.txt for details.
- - dma-names: Must be "rx-tx".
- - clocks : clocks phandle and clock specifier corresponding to each clock
- specified in clock-names.
- - clock-names : The "gpmi_io" clock is always required. Which clocks are
- exactly required depends on chip:
- * imx23/imx28 : "gpmi_io"
- * imx6q/sx : "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch"
- * imx7d : "gpmi_io", "gpmi_bch_apb"
-
-Optional properties:
- - nand-on-flash-bbt: boolean to enable on flash bbt option if not
- present false
- - fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC
- strength required. The required ECC strength is
- automatically discoverable for some flash
- (e.g., according to the ONFI standard).
- However, note that if this strength is not
- discoverable or this property is not enabled,
- the software may chooses an implementation-defined
- ECC scheme.
- - fsl,no-blockmark-swap: Don't swap the bad block marker from the OOB
- area with the byte in the data area but rely on the
- flash based BBT for identifying bad blocks.
- NOTE: this is only valid in conjunction with
- 'nand-on-flash-bbt'.
- WARNING: on i.MX28 blockmark swapping cannot be
- disabled for the BootROM in the FCB. Thus,
- partitions written from Linux with this feature
- turned on may not be accessible by the BootROM
- code.
- - nand-ecc-strength: integer representing the number of bits to correct
- per ECC step. Needs to be a multiple of 2.
- - nand-ecc-step-size: integer representing the number of data bytes
- that are covered by a single ECC step. The driver
- supports 512 and 1024.
-
-The device tree may optionally contain sub-nodes describing partitions of the
-address space. See partition.txt for more detail.
-
-Examples:
-
-gpmi-nand@8000c000 {
- compatible = "fsl,imx28-gpmi-nand";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x8000c000 2000>, <0x8000a000 2000>;
- reg-names = "gpmi-nand", "bch";
- interrupts = <41>;
- interrupt-names = "bch";
- dmas = <&dma_apbh 4>;
- dma-names = "rx-tx";
-
- partition@0 {
- ...
- };
-};
--- /dev/null
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale General-Purpose Media Interface (GPMI) binding
+
+maintainers:
+ - Han Xu <han.xu@nxp.com>
+
+allOf:
+ - $ref: "nand-controller.yaml"
+
+description: |
+ The GPMI nand controller provides an interface to control the NAND
+ flash chips. The device tree may optionally contain sub-nodes
+ describing partitions of the address space. See partition.txt for
+ more detail.
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx23-gpmi-nand
+ - fsl,imx28-gpmi-nand
+ - fsl,imx6q-gpmi-nand
+ - fsl,imx6sx-gpmi-nand
+ - fsl,imx7d-gpmi-nand
+
+ reg:
+ items:
+ - description: Address and length of gpmi block.
+ - description: Address and length of bch block.
+
+ reg-names:
+ items:
+ - const: gpmi-nand
+ - const: bch
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ const: bch
+
+ dmas:
+ maxItems: 1
+
+ dma-names:
+ const: rx-tx
+
+ clocks:
+ minItems: 1
+ maxItems: 5
+ items:
+ - description: SoC gpmi io clock
+ - description: SoC gpmi apb clock
+ - description: SoC gpmi bch clock
+ - description: SoC gpmi bch apb clock
+ - description: SoC per1 bch clock
+
+ clock-names:
+ minItems: 1
+ maxItems: 5
+ items:
+ - const: gpmi_io
+ - const: gpmi_apb
+ - const: gpmi_bch
+ - const: gpmi_bch_apb
+ - const: per1_bch
+
+ fsl,use-minimum-ecc:
+ type: boolean
+ description: |
+ Protect this NAND flash with the minimum ECC strength required.
+ The required ECC strength is automatically discoverable for some
+ flash (e.g., according to the ONFI standard). However, note that
+ if this strength is not discoverable or this property is not enabled,
+ the software may chooses an implementation-defined ECC scheme.
+
+ fsl,no-blockmark-swap:
+ type: boolean
+ description: |
+ Don't swap the bad block marker from the OOB area with the byte in
+ the data area but rely on the flash based BBT for identifying bad blocks.
+ NOTE: this is only valid in conjunction with 'nand-on-flash-bbt'.
+ WARNING: on i.MX28 blockmark swapping cannot be disabled for the BootROM
+ in the FCB. Thus, partitions written from Linux with this feature turned
+ on may not be accessible by the BootROM code.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - dmas
+ - dma-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ nand-controller@8000c000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx28-gpmi-nand";
+ reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
+ reg-names = "gpmi-nand", "bch";
+ interrupts = <41>;
+ interrupt-names = "bch";
+ clocks = <&clks 50>;
+ clock-names = "gpmi_io";
+ dmas = <&dma_apbh 4>;
+ dma-names = "rx-tx";
+ };
projects / platform / kernel / linux-rpi.git / commitdiff