drm/amd/display: Update DCN32 and DCN321 SR latencies
authorAlvin Lee <Alvin.Lee2@amd.com>
Thu, 19 May 2022 18:03:09 +0000 (14:03 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 25 Jul 2022 21:17:43 +0000 (17:17 -0400)
Update worst case SR latencies according to values measured by hardware
team.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c

index 01e272f..6645354 100644 (file)
@@ -121,8 +121,8 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_2_soc = {
                },
        },
        .num_states = 1,
-       .sr_exit_time_us = 5.20,
-       .sr_enter_plus_exit_time_us = 9.60,
+       .sr_exit_time_us = 20.16,
+       .sr_enter_plus_exit_time_us = 27.13,
        .sr_exit_z8_time_us = 285.0,
        .sr_enter_plus_exit_z8_time_us = 320,
        .writeback_latency_us = 12.0,
index 6e72336..84b4b00 100644 (file)
@@ -119,8 +119,8 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_21_soc = {
                },
        },
        .num_states = 1,
-       .sr_exit_time_us = 5.20,
-       .sr_enter_plus_exit_time_us = 9.60,
+       .sr_exit_time_us = 12.36,
+       .sr_enter_plus_exit_time_us = 16.72,
        .sr_exit_z8_time_us = 285.0,
        .sr_enter_plus_exit_z8_time_us = 320,
        .writeback_latency_us = 12.0,