cafe_writel(cafe, 1, NAND_RESET);
cafe_writel(cafe, 0, NAND_RESET);
- cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);
+ cafe_writel(cafe, timing1, NAND_TIMING1);
+ cafe_writel(cafe, timing2, NAND_TIMING2);
+ cafe_writel(cafe, timing3, NAND_TIMING3);
- /* Timings from Marvell's test code (not verified or calculated by us) */
- if (!slowtiming) {
- cafe_writel(cafe, 0x01010a0a, NAND_TIMING1);
- cafe_writel(cafe, 0x24121212, NAND_TIMING2);
- cafe_writel(cafe, 0x11000000, NAND_TIMING3);
- } else {
- cafe_writel(cafe, 0xffffffff, NAND_TIMING1);
- cafe_writel(cafe, 0xffffffff, NAND_TIMING2);
- cafe_writel(cafe, 0xffffffff, NAND_TIMING3);
- }
cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);
- err = request_irq(pdev->irq, &cafe_nand_interrupt, SA_SHIRQ, "CAFE NAND", mtd);
+ err = request_irq(pdev->irq, &cafe_nand_interrupt, IRQF_SHARED,
+ "CAFE NAND", mtd);
if (err) {
dev_warn(&pdev->dev, "Could not register IRQ %d\n", pdev->irq);
-
goto out_free_dma;
}
- #if 1
+
/* Disable master reset, enable NAND clock */
ctrl = cafe_readl(cafe, GLOBAL_CTRL);
ctrl &= 0xffffeff0;