mtd: spi: spi-nor-core: Add SPI MEM support

Many SPI controllers have special MMIO interfaces which provide
accelerated read/write access but require knowledge of flash parameters
to make use of it. Recent spi-mem layer provides a way to support such
controllers.
Therefore, add spi-mem support to spi-nor-core as a way to support SPI
controllers with MMIO interface. SPI MEM layer takes care of translating
spi_mem_ops to spi_xfer()s in case of legacy SPI controllers.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 54ef94d..66e9425 100644 (file)
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -88,26 +88,115 @@ struct flash_info {
 
 #define JEDEC_MFR(info)        ((info)->id[0])
 
+static int spi_nor_read_write_reg(struct spi_nor *nor, struct spi_mem_op
+               *op, void *buf)
+{
+       if (op->data.dir == SPI_MEM_DATA_IN)
+               op->data.buf.in = buf;
+       else
+               op->data.buf.out = buf;
+       return spi_mem_exec_op(nor->spi, op);
+}
+
 static int spi_nor_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
 {
-       return -EINVAL;
+       struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(code, 1),
+                                         SPI_MEM_OP_NO_ADDR,
+                                         SPI_MEM_OP_NO_DUMMY,
+                                         SPI_MEM_OP_DATA_IN(len, NULL, 1));
+       int ret;
+
+       ret = spi_nor_read_write_reg(nor, &op, val);
+       if (ret < 0)
+               dev_dbg(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
+                       code);
+
+       return ret;
 }
 
 static int spi_nor_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
 {
-       return -EINVAL;
+       struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 1),
+                                         SPI_MEM_OP_NO_ADDR,
+                                         SPI_MEM_OP_NO_DUMMY,
+                                         SPI_MEM_OP_DATA_OUT(len, NULL, 1));
+
+       return spi_nor_read_write_reg(nor, &op, buf);
 }
 
 static ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
                                 u_char *buf)
 {
-       return -EINVAL;
+       struct spi_mem_op op =
+                       SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
+                                  SPI_MEM_OP_ADDR(nor->addr_width, from, 1),
+                                  SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
+                                  SPI_MEM_OP_DATA_IN(len, buf, 1));
+       size_t remaining = len;
+       int ret;
+
+       /* get transfer protocols. */
+       op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto);
+       op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
+       op.dummy.buswidth = op.addr.buswidth;
+       op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto);
+
+       /* convert the dummy cycles to the number of bytes */
+       op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
+
+       while (remaining) {
+               op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
+               ret = spi_mem_adjust_op_size(nor->spi, &op);
+               if (ret)
+                       return ret;
+
+               ret = spi_mem_exec_op(nor->spi, &op);
+               if (ret)
+                       return ret;
+
+               op.addr.val += op.data.nbytes;
+               remaining -= op.data.nbytes;
+               op.data.buf.in += op.data.nbytes;
+       }
+
+       return len;
 }
 
 static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
                                  const u_char *buf)
 {
-       return -EINVAL;
+       struct spi_mem_op op =
+                       SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1),
+                                  SPI_MEM_OP_ADDR(nor->addr_width, to, 1),
+                                  SPI_MEM_OP_NO_DUMMY,
+                                  SPI_MEM_OP_DATA_OUT(len, buf, 1));
+       size_t remaining = len;
+       int ret;
+
+       /* get transfer protocols. */
+       op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->write_proto);
+       op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->write_proto);
+       op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto);
+
+       if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
+               op.addr.nbytes = 0;
+
+       while (remaining) {
+               op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
+               ret = spi_mem_adjust_op_size(nor->spi, &op);
+               if (ret)
+                       return ret;
+
+               ret = spi_mem_exec_op(nor->spi, &op);
+               if (ret)
+                       return ret;
+
+               op.addr.val += op.data.nbytes;
+               remaining -= op.data.nbytes;
+               op.data.buf.out += op.data.nbytes;
+       }
+
+       return len;
 }
 
 /*