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dmaengine: xilinx_dma: Increase AXI DMA transaction segment count
author
Radhey Shyam Pandey
<radhey.shyam.pandey@amd.com>
Mon, 7 Aug 2023 05:51:43 +0000
(11:21 +0530)
committer
Vinod Koul
<vkoul@kernel.org>
Mon, 21 Aug 2023 13:10:37 +0000
(18:40 +0530)
Increase AXI DMA transaction segments count to ensure that even in
high load we always get a free segment in prepare descriptor for a
DMA_SLAVE transaction.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Link:
https://lore.kernel.org/r/1691387509-2113129-5-git-send-email-radhey.shyam.pandey@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/xilinx/xilinx_dma.c
patch
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diff --git
a/drivers/dma/xilinx/xilinx_dma.c
b/drivers/dma/xilinx/xilinx_dma.c
index
fa31cd0
..
9bdce8f
100644
(file)
--- a/
drivers/dma/xilinx/xilinx_dma.c
+++ b/
drivers/dma/xilinx/xilinx_dma.c
@@
-178,7
+178,7
@@
#define XILINX_DMA_BD_SOP BIT(27)
#define XILINX_DMA_BD_EOP BIT(26)
#define XILINX_DMA_COALESCE_MAX 255
-#define XILINX_DMA_NUM_DESCS
255
+#define XILINX_DMA_NUM_DESCS
512
#define XILINX_DMA_NUM_APP_WORDS 5
/* AXI CDMA Specific Registers/Offsets */