drm/amdgpu: complement the 4, 6 and 8 XCC cases
authorShiwu Zhang <shiwu.zhang@amd.com>
Wed, 17 May 2023 05:40:04 +0000 (13:40 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 15:02:17 +0000 (11:02 -0400)
Signed-off-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

index 35d359d..ebdd7fa 100644 (file)
@@ -1040,6 +1040,9 @@ static void gfx_v9_4_3_xcc_program_xcc_id(struct amdgpu_device *adev,
                WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, 0x8);
                break;
        case 2:
+       case 4:
+       case 6:
+       case 8:
                tmp = (xcc_id % adev->gfx.num_xcc_per_xcp) << REG_FIELD_SHIFT(CP_HYP_XCP_CTL, VIRTUAL_XCC_ID);
                tmp = tmp | (adev->gfx.num_xcc_per_xcp << REG_FIELD_SHIFT(CP_HYP_XCP_CTL, NUM_XCC_IN_XCP));
                WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, tmp);