return 0;
}
-static int sdio_clear_int(struct wilc *wilc)
-{
- struct sdio_func *func = dev_to_sdio_func(wilc->dev);
-
- if (!g_sdio.irq_gpio) {
- /* u32 sts; */
- sdio_cmd52_t cmd;
-
- cmd.read_write = 0;
- cmd.function = 1;
- cmd.raw = 0;
- cmd.address = 0x4;
- cmd.data = 0;
- wilc_sdio_cmd52(wilc, &cmd);
-
- return cmd.data;
- } else {
- u32 reg;
-
- if (!sdio_read_reg(wilc, WILC_HOST_RX_CTRL_0, ®)) {
- dev_err(&func->dev, "Failed read reg (%08x)...\n",
- WILC_HOST_RX_CTRL_0);
- return 0;
- }
- reg &= ~0x1;
- sdio_write_reg(wilc, WILC_HOST_RX_CTRL_0, reg);
- return 1;
- }
-
-}
-
/********************************************
*
* Sdio interfaces
return 1;
}
-static int sdio_sync(struct wilc *wilc)
-{
- struct sdio_func *func = dev_to_sdio_func(wilc->dev);
- u32 reg;
-
- /**
- * Disable power sequencer
- **/
- if (!sdio_read_reg(wilc, WILC_MISC, ®)) {
- dev_err(&func->dev, "Failed read misc reg...\n");
- return 0;
- }
-
- reg &= ~BIT(8);
- if (!sdio_write_reg(wilc, WILC_MISC, reg)) {
- dev_err(&func->dev, "Failed write misc reg...\n");
- return 0;
- }
-
- if (g_sdio.irq_gpio) {
- u32 reg;
- int ret;
-
- /**
- * interrupt pin mux select
- **/
- ret = sdio_read_reg(wilc, WILC_PIN_MUX_0, ®);
- if (!ret) {
- dev_err(&func->dev, "Failed read reg (%08x)...\n",
- WILC_PIN_MUX_0);
- return 0;
- }
- reg |= BIT(8);
- ret = sdio_write_reg(wilc, WILC_PIN_MUX_0, reg);
- if (!ret) {
- dev_err(&func->dev, "Failed write reg (%08x)...\n",
- WILC_PIN_MUX_0);
- return 0;
- }
-
- /**
- * interrupt enable
- **/
- ret = sdio_read_reg(wilc, WILC_INTR_ENABLE, ®);
- if (!ret) {
- dev_err(&func->dev, "Failed read reg (%08x)...\n",
- WILC_INTR_ENABLE);
- return 0;
- }
- reg |= BIT(16);
- ret = sdio_write_reg(wilc, WILC_INTR_ENABLE, reg);
- if (!ret) {
- dev_err(&func->dev, "Failed write reg (%08x)...\n",
- WILC_INTR_ENABLE);
- return 0;
- }
- }
-
- return 1;
-}
-
static int sdio_init(struct wilc *wilc)
{
struct sdio_func *func = dev_to_sdio_func(wilc->dev);
.hif_write_reg = sdio_write_reg,
.hif_block_rx = sdio_read,
.hif_block_tx = sdio_write,
- .hif_sync = sdio_sync,
- .hif_clear_int = sdio_clear_int,
.hif_read_int = sdio_read_int,
.hif_clear_int_ext = sdio_clear_int_ext,
.hif_read_size = sdio_read_size,
*
********************************************/
-static int wilc_spi_clear_int(struct wilc *wilc)
-{
- struct spi_device *spi = to_spi_device(wilc->dev);
- u32 reg;
-
- if (!wilc_spi_read_reg(wilc, WILC_HOST_RX_CTRL_0, ®)) {
- dev_err(&spi->dev, "Failed read reg (%08x)...\n",
- WILC_HOST_RX_CTRL_0);
- return 0;
- }
- reg &= ~0x1;
- wilc_spi_write_reg(wilc, WILC_HOST_RX_CTRL_0, reg);
- return 1;
-}
-
static int _wilc_spi_deinit(struct wilc *wilc)
{
/**
return 1;
}
-static int wilc_spi_sync(struct wilc *wilc)
-{
- struct spi_device *spi = to_spi_device(wilc->dev);
- u32 reg;
- int ret;
-
- /**
- * interrupt pin mux select
- **/
- ret = wilc_spi_read_reg(wilc, WILC_PIN_MUX_0, ®);
- if (!ret) {
- dev_err(&spi->dev,"Failed read reg (%08x)...\n",
- WILC_PIN_MUX_0);
- return 0;
- }
- reg |= BIT(8);
- ret = wilc_spi_write_reg(wilc, WILC_PIN_MUX_0, reg);
- if (!ret) {
- dev_err(&spi->dev, "Failed write reg (%08x)...\n",
- WILC_PIN_MUX_0);
- return 0;
- }
-
- /**
- * interrupt enable
- **/
- ret = wilc_spi_read_reg(wilc, WILC_INTR_ENABLE, ®);
- if (!ret) {
- dev_err(&spi->dev, "Failed read reg (%08x)...\n",
- WILC_INTR_ENABLE);
- return 0;
- }
- reg |= BIT(16);
- ret = wilc_spi_write_reg(wilc, WILC_INTR_ENABLE, reg);
- if (!ret) {
- dev_err(&spi->dev, "Failed write reg (%08x)...\n",
- WILC_INTR_ENABLE);
- return 0;
- }
-
- return 1;
-}
-
static int _wilc_spi_init(struct wilc *wilc)
{
struct spi_device *spi = to_spi_device(wilc->dev);
.hif_write_reg = wilc_spi_write_reg,
.hif_block_rx = _wilc_spi_read,
.hif_block_tx = _wilc_spi_write,
- .hif_sync = wilc_spi_sync,
- .hif_clear_int = wilc_spi_clear_int,
.hif_read_int = wilc_spi_read_int,
.hif_clear_int_ext = wilc_spi_clear_int_ext,
.hif_read_size = wilc_spi_read_size,
int (*hif_write_reg)(struct wilc *, u32, u32);
int (*hif_block_rx)(struct wilc *, u32, u8 *, u32);
int (*hif_block_tx)(struct wilc *, u32, u8 *, u32);
- int (*hif_sync)(struct wilc *);
- int (*hif_clear_int)(struct wilc *);
int (*hif_read_int)(struct wilc *, u32 *);
int (*hif_clear_int_ext)(struct wilc *, u32);
int (*hif_read_size)(struct wilc *, u32 *);