arm64: dts: qcom: sm8150: Add ADSP, CDSP, MPSS and SLPI remoteprocs
authorSibi Sankar <sibis@codeaurora.org>
Tue, 17 Dec 2019 09:25:03 +0000 (14:55 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 18 Dec 2019 06:18:58 +0000 (22:18 -0800)
Add ADSP, CDSP, MPSS and SLPI device tree nodes for SM8150 SoC.

Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191217092503.10699-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sm8150-mtp.dts
arch/arm64/boot/dts/qcom/sm8150.dtsi

index d6837d7..c00dd3d 100644 (file)
        };
 };
 
+&remoteproc_adsp {
+       status = "okay";
+};
+
+&remoteproc_cdsp {
+       status = "okay";
+};
+
+&remoteproc_slpi {
+       status = "okay";
+};
+
 &tlmm {
        gpio-reserved-ranges = <0 4>, <126 4>;
 };
index 06f04e4..694be3c 100644 (file)
@@ -5,6 +5,7 @@
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/qcom-aoss-qmp.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
                        reg = <0x0 0x01f40000 0x0 0x40000>;
                };
 
+               remoteproc_slpi: remoteproc@2400000 {
+                       compatible = "qcom,sm8150-slpi-pas";
+                       reg = <0x0 0x02400000 0x0 0x4040>;
+
+                       interrupts-extended = <&intc GIC_SPI 494 IRQ_TYPE_EDGE_RISING>,
+                                             <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+                                             <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+                                             <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "wdog", "fatal", "ready",
+                                         "handover", "stop-ack";
+
+                       clocks = <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "xo";
+
+                       power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>,
+                                       <&rpmhpd SM8150_LCX>,
+                                       <&rpmhpd SM8150_LMX>;
+                       power-domain-names = "load_state", "lcx", "lmx";
+
+                       memory-region = <&slpi_mem>;
+
+                       qcom,smem-states = <&slpi_smp2p_out 0>;
+                       qcom,smem-state-names = "stop";
+
+                       status = "disabled";
+
+                       glink-edge {
+                               interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>;
+                               label = "dsps";
+                               qcom,remote-pid = <3>;
+                               mboxes = <&apss_shared 24>;
+                       };
+               };
+
                tlmm: pinctrl@3100000 {
                        compatible = "qcom,sm8150-pinctrl";
                        reg = <0x0 0x03100000 0x0 0x300000>,
                        #interrupt-cells = <2>;
                };
 
+               remoteproc_mpss: remoteproc@4080000 {
+                       compatible = "qcom,sm8150-mpss-pas";
+                       reg = <0x0 0x04080000 0x0 0x4040>;
+
+                       interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
+                                             <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+                                             <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+                                             <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+                                             <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "wdog", "fatal", "ready", "handover",
+                                         "stop-ack", "shutdown-ack";
+
+                       clocks = <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "xo";
+
+                       power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>,
+                                       <&rpmhpd SM8150_CX>,
+                                       <&rpmhpd SM8150_MSS>;
+                       power-domain-names = "load_state", "cx", "mss";
+
+                       memory-region = <&mpss_mem>;
+
+                       qcom,smem-states = <&modem_smp2p_out 0>;
+                       qcom,smem-state-names = "stop";
+
+                       glink-edge {
+                               interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
+                               label = "modem";
+                               qcom,remote-pid = <1>;
+                               mboxes = <&apss_shared 12>;
+                       };
+               };
+
+               remoteproc_cdsp: remoteproc@8300000 {
+                       compatible = "qcom,sm8150-cdsp-pas";
+                       reg = <0x0 0x08300000 0x0 0x4040>;
+
+                       interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
+                                             <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+                                             <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+                                             <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "wdog", "fatal", "ready",
+                                         "handover", "stop-ack";
+
+                       clocks = <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "xo";
+
+                       power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>,
+                                       <&rpmhpd SM8150_CX>;
+                       power-domain-names = "load_state", "cx";
+
+                       memory-region = <&cdsp_mem>;
+
+                       qcom,smem-states = <&cdsp_smp2p_out 0>;
+                       qcom,smem-state-names = "stop";
+
+                       status = "disabled";
+
+                       glink-edge {
+                               interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>;
+                               label = "cdsp";
+                               qcom,remote-pid = <5>;
+                               mboxes = <&apss_shared 4>;
+                       };
+               };
+
                aoss_qmp: power-controller@c300000 {
                        compatible = "qcom,sm8150-aoss-qmp";
                        reg = <0x0 0x0c300000 0x0 0x100000>;
                        cell-index = <0>;
                };
 
+               remoteproc_adsp: remoteproc@17300000 {
+                       compatible = "qcom,sm8150-adsp-pas";
+                       reg = <0x0 0x17300000 0x0 0x4040>;
+
+                       interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
+                                             <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+                                             <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+                                             <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "wdog", "fatal", "ready",
+                                         "handover", "stop-ack";
+
+                       clocks = <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "xo";
+
+                       power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>,
+                                       <&rpmhpd SM8150_CX>;
+                       power-domain-names = "load_state", "cx";
+
+                       memory-region = <&adsp_mem>;
+
+                       qcom,smem-states = <&adsp_smp2p_out 0>;
+                       qcom,smem-state-names = "stop";
+
+                       status = "disabled";
+
+                       glink-edge {
+                               interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
+                               label = "lpass";
+                               qcom,remote-pid = <2>;
+                               mboxes = <&apss_shared 8>;
+                       };
+               };
+
                intc: interrupt-controller@17a00000 {
                        compatible = "arm,gic-v3";
                        interrupt-controller;