sunxi: clock: Add clock_get_pll3() helper function

Add a helper function to get the pll3 clock rate.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
index c3e04af..7c8eff9 100644 (file)
--- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
@@ -198,6 +198,15 @@ void clock_set_pll3(unsigned int clk)
               CCM_PLL3_CTRL_M(clk / 3000000), &ccm->pll3_cfg);
 }
 
+unsigned int clock_get_pll3(void)
+{
+       struct sunxi_ccm_reg *const ccm =
+               (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+       uint32_t rval = readl(&ccm->pll3_cfg);
+       int m = ((rval & CCM_PLL3_CTRL_M_MASK) >> CCM_PLL3_CTRL_M_SHIFT);
+       return 3000000 * m;
+}
+
 unsigned int clock_get_pll5p(void)
 {
        struct sunxi_ccm_reg *const ccm =

diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
index 3bfa122..1d6f839 100644 (file)
--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@ -188,6 +188,18 @@ void clock_set_pll11(unsigned int clk, bool sigma_delta_enable)
 }
 #endif
 
+unsigned int clock_get_pll3(void)
+{
+       struct sunxi_ccm_reg *const ccm =
+               (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+       uint32_t rval = readl(&ccm->pll3_cfg);
+       int n = ((rval & CCM_PLL3_CTRL_N_MASK) >> CCM_PLL3_CTRL_N_SHIFT) + 1;
+       int m = ((rval & CCM_PLL3_CTRL_M_MASK) >> CCM_PLL3_CTRL_M_SHIFT) + 1;
+
+       /* Multiply by 1000 after dividing by m to avoid integer overflows */
+       return (24000 * n / m) * 1000;
+}
+
 unsigned int clock_get_pll6(void)
 {
        struct sunxi_ccm_reg *const ccm =

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index b397809..1a0b525 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -208,6 +208,8 @@ struct sunxi_ccm_reg {
 #define CCM_AHB_GATE_DLL (0x1 << 15)
 #define CCM_AHB_GATE_ACE (0x1 << 16)
 
+#define CCM_PLL3_CTRL_M_SHIFT          0
+#define CCM_PLL3_CTRL_M_MASK           (0x7f << CCM_PLL3_CTRL_M_SHIFT)
 #define CCM_PLL3_CTRL_M(n)             (((n) & 0x7f) << 0)
 #define CCM_PLL3_CTRL_INTEGER_MODE     (0x1 << 15)
 #define CCM_PLL3_CTRL_EN               (0x1 << 31)
@@ -347,6 +349,7 @@ struct sunxi_ccm_reg {
 #ifndef __ASSEMBLY__
 void clock_set_pll1(unsigned int hz);
 void clock_set_pll3(unsigned int hz);
+unsigned int clock_get_pll3(void);
 unsigned int clock_get_pll5p(void);
 unsigned int clock_get_pll6(void);
 #endif

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index 06c6feb..a197345 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -179,7 +179,11 @@ struct sunxi_ccm_reg {
 #define CCM_PLL1_CTRL_P(n)             (((n) & 0x3) << 16)
 #define CCM_PLL1_CTRL_EN               (0x1 << 31)
 
+#define CCM_PLL3_CTRL_M_SHIFT          0
+#define CCM_PLL3_CTRL_M_MASK           (0xf << CCM_PLL3_CTRL_M_SHIFT)
 #define CCM_PLL3_CTRL_M(n)             ((((n) - 1) & 0xf) << 0)
+#define CCM_PLL3_CTRL_N_SHIFT          8
+#define CCM_PLL3_CTRL_N_MASK           (0x7f << CCM_PLL3_CTRL_N_SHIFT)
 #define CCM_PLL3_CTRL_N(n)             ((((n) - 1) & 0x7f) << 8)
 #define CCM_PLL3_CTRL_INTEGER_MODE     (0x1 << 24)
 #define CCM_PLL3_CTRL_EN               (0x1 << 31)
@@ -360,6 +364,7 @@ void clock_set_pll1(unsigned int hz);
 void clock_set_pll3(unsigned int hz);
 void clock_set_pll5(unsigned int clk, bool sigma_delta_enable);
 void clock_set_pll11(unsigned int clk, bool sigma_delta_enable);
+unsigned int clock_get_pll3(void);
 unsigned int clock_get_pll6(void);
 #endif