ARM: dts: sunxi: Restore EMAC changes (boards)

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore all boards DT about dwmac-sun8i
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index b1502df7b50923a70d996847d1cd258d92cda73c..6713d0f2b3f4d3f3f62231bf6a74bf35828ce8b0 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,6 +56,8 @@
 
        aliases {
                serial0 = &uart0;
+               /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+               ethernet0 = &emac;
                ethernet1 = &xr819;
        };
 
@@ -102,6 +104,13 @@
        status = "okay";
 };
 
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
 &mmc0 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc0_pins_a>;

diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e1dba9ffa94bb50ad2f77a0f46f45c282908e598..f2292deaa5908e845c68f73f2ed186b561b7d29a 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,6 +52,7 @@
        compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
 
        aliases {
+               ethernet0 = &emac;
                serial0 = &uart0;
                serial1 = &uart1;
        };
@@ -111,6 +112,24 @@
        status = "okay";
 };
 
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&emac_rgmii_pins>;
+       phy-supply = <&reg_gmac_3v3>;
+       phy-handle = <&ext_rgmii_phy>;
+       phy-mode = "rgmii";
+
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
+&external_mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <0>;
+       };
+};
+
 &ir {
        pinctrl-names = "default";
        pinctrl-0 = <&ir_pins_a>;

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index 73766d38ee6ce5209b6d6cc6cda4ac6eabfab0ef..0a8b79cf59549769dc1cb949ef65b3eccad1b7dd 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -51,6 +51,16 @@
                ethernet1 = &sdio_wifi;
        };
 
+       reg_gmac_3v3: gmac-3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "gmac-3v3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               startup-delay-us = <100000>;
+               enable-active-high;
+               gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+       };
+
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                pinctrl-names = "default";
@@ -66,6 +76,25 @@
        status = "okay";
 };
 
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&emac_rgmii_pins>;
+       phy-supply = <&reg_gmac_3v3>;
+       phy-handle = <&ext_rgmii_phy>;
+       phy-mode = "rgmii";
+
+       allwinner,leds-active-low;
+
+       status = "okay";
+};
+
+&external_mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <7>;
+       };
+};
+
 &ir {
        pinctrl-names = "default";
        pinctrl-0 = <&ir_pins_a>;

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 8d2cc6e9a03faff3cc71965493e5c54c1359e9f3..78f6c24952dd128249fd3010d212222832bb060a 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,3 +46,10 @@
        model = "FriendlyARM NanoPi NEO";
        compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
 };
+
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 1bf51802f5aa28d23a8e3c69ccef92373b904d5f..b20be95b49d5c686f011aaff5c2be90b448dd7e7 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,6 +54,7 @@
        aliases {
                serial0 = &uart0;
                /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+               ethernet0 = &emac;
                ethernet1 = &rtl8189;
        };
 
@@ -117,6 +118,13 @@
        status = "okay";
 };
 
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
 &ir {
        pinctrl-names = "default";
        pinctrl-0 = <&ir_pins_a>;

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index a1c6ff6fd05d38e767a5819006f61203c5a5451e..82e5d28cd698c7b423f2ab2c2e5cc9da5f09dc0f 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -52,6 +52,7 @@
        compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
 
        aliases {
+               ethernet0 = &emac;
                serial0 = &uart0;
        };
 
@@ -97,6 +98,13 @@
        status = "okay";
 };
 
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
 &mmc0 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
index 8b93f5c781a70b565ed0012d2c29b35f04987dcd..a10281b455f50ccad1f26087ae14884600c19c90 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -53,6 +53,11 @@
        };
 };
 
+&emac {
+       /* LEDs changed to active high on the plus */
+       /delete-property/ allwinner,leds-active-low;
+};
+
 &mmc1 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc1_pins_a>;

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index ea4e0029c0d4e055be1a1326a743e7e69dba53a5..d22546df1b822b6aa195dba75c5874d4c1db5c01 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -52,6 +52,7 @@
        compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
 
        aliases {
+               ethernet0 = &emac;
                serial0 = &uart0;
        };
 
@@ -113,6 +114,13 @@
        status = "okay";
 };
 
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
 &ir {
        pinctrl-names = "default";
        pinctrl-0 = <&ir_pins_a>;

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index 72ca01b93f1b7e4a4943060e08c731f876321454..cbc499b04de44c4c16563e3d8c9828b683944686 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -47,6 +47,10 @@
        model = "Xunlong Orange Pi Plus / Plus 2";
        compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
 
+       aliases {
+               ethernet0 = &emac;
+       };
+
        reg_gmac_3v3: gmac-3v3 {
                compatible = "regulator-fixed";
                regulator-name = "gmac-3v3";
@@ -74,6 +78,24 @@
        status = "okay";
 };
 
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&emac_rgmii_pins>;
+       phy-supply = <&reg_gmac_3v3>;
+       phy-handle = <&ext_rgmii_phy>;
+       phy-mode = "rgmii";
+
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
+&external_mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <0>;
+       };
+};
+
 &mmc2 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc2_8bit_pins>;

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
index 97920b12a944526f3c5dd15de7435f5e30195a3c..6dbf7b2e0c13c44f06e7970c006f3357f0d0493e 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
@@ -61,3 +61,19 @@
                gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
        };
 };
+
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&emac_rgmii_pins>;
+       phy-supply = <&reg_gmac_3v3>;
+       phy-handle = <&ext_rgmii_phy>;
+       phy-mode = "rgmii";
+       status = "okay";
+};
+
+&external_mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
+};