drm/ttm: nuke memory type flags

It's not supported to specify more than one of those flags.
So it never made sense to make this a flag in the first place.

Nuke the flags and specify directly which memory type to use.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/389826/?series=81551&rev=1

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index b36d94f57d428d6cb0743375200cd7675ddc18b6..eaff4c4506ebd8216a803735d487f0ecd5321541 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -136,8 +136,8 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
 
                places[c].fpfn = 0;
                places[c].lpfn = 0;
-               places[c].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
-                       TTM_PL_FLAG_VRAM;
+               places[c].mem_type = TTM_PL_VRAM;
+               places[c].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
 
                if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)
                        places[c].lpfn = visible_pfn;
@@ -152,7 +152,8 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
        if (domain & AMDGPU_GEM_DOMAIN_GTT) {
                places[c].fpfn = 0;
                places[c].lpfn = 0;
-               places[c].flags = TTM_PL_FLAG_TT;
+               places[c].mem_type = TTM_PL_TT;
+               places[c].flags = 0;
                if (flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
                        places[c].flags |= TTM_PL_FLAG_WC |
                                TTM_PL_FLAG_UNCACHED;
@@ -164,7 +165,8 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
        if (domain & AMDGPU_GEM_DOMAIN_CPU) {
                places[c].fpfn = 0;
                places[c].lpfn = 0;
-               places[c].flags = TTM_PL_FLAG_SYSTEM;
+               places[c].mem_type = TTM_PL_SYSTEM;
+               places[c].flags = 0;
                if (flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
                        places[c].flags |= TTM_PL_FLAG_WC |
                                TTM_PL_FLAG_UNCACHED;
@@ -176,28 +178,32 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
        if (domain & AMDGPU_GEM_DOMAIN_GDS) {
                places[c].fpfn = 0;
                places[c].lpfn = 0;
-               places[c].flags = TTM_PL_FLAG_UNCACHED | AMDGPU_PL_FLAG_GDS;
+               places[c].mem_type = AMDGPU_PL_GDS;
+               places[c].flags = TTM_PL_FLAG_UNCACHED;
                c++;
        }
 
        if (domain & AMDGPU_GEM_DOMAIN_GWS) {
                places[c].fpfn = 0;
                places[c].lpfn = 0;
-               places[c].flags = TTM_PL_FLAG_UNCACHED | AMDGPU_PL_FLAG_GWS;
+               places[c].mem_type = AMDGPU_PL_GWS;
+               places[c].flags = TTM_PL_FLAG_UNCACHED;
                c++;
        }
 
        if (domain & AMDGPU_GEM_DOMAIN_OA) {
                places[c].fpfn = 0;
                places[c].lpfn = 0;
-               places[c].flags = TTM_PL_FLAG_UNCACHED | AMDGPU_PL_FLAG_OA;
+               places[c].mem_type = AMDGPU_PL_OA;
+               places[c].flags = TTM_PL_FLAG_UNCACHED;
                c++;
        }
 
        if (!c) {
                places[c].fpfn = 0;
                places[c].lpfn = 0;
-               places[c].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
+               places[c].mem_type = TTM_PL_SYSTEM;
+               places[c].flags = TTM_PL_MASK_CACHING;
                c++;
        }
 
@@ -591,7 +597,7 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
                amdgpu_cs_report_moved_bytes(adev, ctx.bytes_moved, 0);
 
        if (bp->flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
-           bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
+           bo->tbo.mem.mem_type == TTM_PL_VRAM) {
                struct dma_fence *fence;
 
                r = amdgpu_fill_buffer(bo, 0, bo->tbo.base.resv, &fence);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 4ffbe4f666081342c4fe9eaf69b7c3ef992bac30..651365183e75f5fd61c7591f46c870e72e9932cb 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -88,7 +88,8 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
        static const struct ttm_place placements = {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM
+               .mem_type = TTM_PL_SYSTEM,
+               .flags = TTM_PL_MASK_CACHING
        };
 
        /* Don't handle scatter gather BOs */
@@ -533,7 +534,8 @@ static int amdgpu_move_vram_ram(struct ttm_buffer_object *bo, bool evict,
        placement.busy_placement = &placements;
        placements.fpfn = 0;
        placements.lpfn = 0;
-       placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
+       placements.mem_type = TTM_PL_TT;
+       placements.flags = TTM_PL_MASK_CACHING;
        r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx);
        if (unlikely(r)) {
                pr_err("Failed to find GTT space for blit from VRAM\n");
@@ -589,7 +591,8 @@ static int amdgpu_move_ram_vram(struct ttm_buffer_object *bo, bool evict,
        placement.busy_placement = &placements;
        placements.fpfn = 0;
        placements.lpfn = 0;
-       placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
+       placements.mem_type = TTM_PL_TT;
+       placements.flags = TTM_PL_MASK_CACHING;
        r = ttm_bo_mem_space(bo, &placement, &tmp_mem, ctx);
        if (unlikely(r)) {
                pr_err("Failed to find GTT space for blit to VRAM\n");
@@ -1171,8 +1174,8 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
                placement.busy_placement = &placements;
                placements.fpfn = 0;
                placements.lpfn = adev->gmc.gart_size >> PAGE_SHIFT;
-               placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM) |
-                       TTM_PL_FLAG_TT;
+               placements.mem_type = TTM_PL_TT;
+               placements.flags = bo->mem.placement;
 
                r = ttm_bo_mem_space(bo, &placement, &tmp, &ctx);
                if (unlikely(r))

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index 7ba2be37e6ba5341e3edf6d3702406e7997457ef..4f9426ecf0391d4e0b5a6ab1604f7e190b8289c6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -32,10 +32,6 @@
 #define AMDGPU_PL_GWS          (TTM_PL_PRIV + 1)
 #define AMDGPU_PL_OA           (TTM_PL_PRIV + 2)
 
-#define AMDGPU_PL_FLAG_GDS             (TTM_PL_FLAG_PRIV << 0)
-#define AMDGPU_PL_FLAG_GWS             (TTM_PL_FLAG_PRIV << 1)
-#define AMDGPU_PL_FLAG_OA              (TTM_PL_FLAG_PRIV << 2)
-
 #define AMDGPU_GTT_MAX_TRANSFER_SIZE   512
 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS        2
 

diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c b/drivers/gpu/drm/drm_gem_vram_helper.c
index da045c5ba1187301ae9197511d0996e37b1589f0..5f10aa7aa0999eb42400a520b26e30dc0dd657b5 100644 (file)
--- a/drivers/gpu/drm/drm_gem_vram_helper.c
+++ b/drivers/gpu/drm/drm_gem_vram_helper.c
@@ -145,21 +145,18 @@ static void drm_gem_vram_placement(struct drm_gem_vram_object *gbo,
        gbo->placement.placement = gbo->placements;
        gbo->placement.busy_placement = gbo->placements;
 
-       if (pl_flag & DRM_GEM_VRAM_PL_FLAG_VRAM)
+       if (pl_flag & DRM_GEM_VRAM_PL_FLAG_VRAM) {
+               gbo->placements[c].mem_type = TTM_PL_VRAM;
                gbo->placements[c++].flags = TTM_PL_FLAG_WC |
                                             TTM_PL_FLAG_UNCACHED |
-                                            TTM_PL_FLAG_VRAM |
-                                            invariant_flags;
-
-       if (pl_flag & DRM_GEM_VRAM_PL_FLAG_SYSTEM)
-               gbo->placements[c++].flags = TTM_PL_MASK_CACHING |
-                                            TTM_PL_FLAG_SYSTEM |
                                             invariant_flags;
+       }
 
-       if (!c)
+       if (pl_flag & DRM_GEM_VRAM_PL_FLAG_SYSTEM || !c) {
+               gbo->placements[c].mem_type = TTM_PL_SYSTEM;
                gbo->placements[c++].flags = TTM_PL_MASK_CACHING |
-                                            TTM_PL_FLAG_SYSTEM |
                                             invariant_flags;
+       }
 
        gbo->placement.num_placement = c;
        gbo->placement.num_busy_placement = c;

diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index ddabefaab7cf790aa32172064894260426008ae2..97e1908eada07795c2fbc21abb522e3ee5238bcb 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -345,12 +345,18 @@ set_placement_list(struct ttm_place *pl, unsigned *n, uint32_t domain,
 {
        *n = 0;
 
-       if (domain & NOUVEAU_GEM_DOMAIN_VRAM)
-               pl[(*n)++].flags = TTM_PL_FLAG_VRAM | flags;
-       if (domain & NOUVEAU_GEM_DOMAIN_GART)
-               pl[(*n)++].flags = TTM_PL_FLAG_TT | flags;
-       if (domain & NOUVEAU_GEM_DOMAIN_CPU)
-               pl[(*n)++].flags = TTM_PL_FLAG_SYSTEM | flags;
+       if (domain & NOUVEAU_GEM_DOMAIN_VRAM) {
+               pl[*n].mem_type = TTM_PL_VRAM;
+               pl[(*n)++].flags = flags;
+       }
+       if (domain & NOUVEAU_GEM_DOMAIN_GART) {
+               pl[*n].mem_type = TTM_PL_TT;
+               pl[(*n)++].flags = flags;
+       }
+       if (domain & NOUVEAU_GEM_DOMAIN_CPU) {
+               pl[*n].mem_type = TTM_PL_SYSTEM;
+               pl[(*n)++].flags = flags;
+       }
 }
 
 static void
@@ -882,7 +888,8 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
        struct ttm_place placement_memtype = {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING
+               .mem_type = TTM_PL_TT,
+               .flags = TTM_PL_MASK_CACHING
        };
        struct ttm_placement placement;
        struct ttm_resource tmp_reg;
@@ -919,7 +926,8 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
        struct ttm_place placement_memtype = {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING
+               .mem_type = TTM_PL_TT,
+               .flags = TTM_PL_MASK_CACHING
        };
        struct ttm_placement placement;
        struct ttm_resource tmp_reg;

diff --git a/drivers/gpu/drm/qxl/qxl_object.c b/drivers/gpu/drm/qxl/qxl_object.c
index b2a1fa61920be9d7d17755f6cb4341fb419ac1f9..2bc364412e8b8f5574d19c36a3898316b3f4cf35 100644 (file)
--- a/drivers/gpu/drm/qxl/qxl_object.c
+++ b/drivers/gpu/drm/qxl/qxl_object.c
@@ -64,16 +64,24 @@ void qxl_ttm_placement_from_domain(struct qxl_bo *qbo, u32 domain, bool pinned)
 
        qbo->placement.placement = qbo->placements;
        qbo->placement.busy_placement = qbo->placements;
-       if (domain == QXL_GEM_DOMAIN_VRAM)
-               qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM | pflag;
+       if (domain == QXL_GEM_DOMAIN_VRAM) {
+               qbo->placements[c].mem_type = TTM_PL_VRAM;
+               qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | pflag;
+       }
        if (domain == QXL_GEM_DOMAIN_SURFACE) {
-               qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_PRIV | pflag;
-               qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM | pflag;
+               qbo->placements[c].mem_type = TTM_PL_PRIV;
+               qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | pflag;
+               qbo->placements[c].mem_type = TTM_PL_VRAM;
+               qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | pflag;
+       }
+       if (domain == QXL_GEM_DOMAIN_CPU) {
+               qbo->placements[c].mem_type = TTM_PL_SYSTEM;
+               qbo->placements[c++].flags = TTM_PL_MASK_CACHING | pflag;
+       }
+       if (!c) {
+               qbo->placements[c].mem_type = TTM_PL_SYSTEM;
+               qbo->placements[c++].flags = TTM_PL_MASK_CACHING;
        }
-       if (domain == QXL_GEM_DOMAIN_CPU)
-               qbo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM | pflag;
-       if (!c)
-               qbo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
        qbo->placement.num_placement = c;
        qbo->placement.num_busy_placement = c;
        for (i = 0; i < c; ++i) {

diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c
index 0b8f12e6dd6a8fd8ea3327aeace89349de5f213d..5ffc8b752f01b5e4014ee506c9db4b2ec540de8d 100644 (file)
--- a/drivers/gpu/drm/qxl/qxl_ttm.c
+++ b/drivers/gpu/drm/qxl/qxl_ttm.c
@@ -55,7 +55,8 @@ static void qxl_evict_flags(struct ttm_buffer_object *bo,
        static const struct ttm_place placements = {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM
+               .mem_type = TTM_PL_SYSTEM,
+               .flags = TTM_PL_MASK_CACHING
        };
 
        if (!qxl_ttm_bo_is_qxl_bo(bo)) {

diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 3fcd15d21ddcca47af3d188078aee6e9555a953d..316e35d3f8a9dd9f7132f391de55fb1c4b6240f5 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -112,58 +112,58 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
                    rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size) {
                        rbo->placements[c].fpfn =
                                rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
+                       rbo->placements[c].mem_type = TTM_PL_VRAM;
                        rbo->placements[c++].flags = TTM_PL_FLAG_WC |
-                                                    TTM_PL_FLAG_UNCACHED |
-                                                    TTM_PL_FLAG_VRAM;
+                                                    TTM_PL_FLAG_UNCACHED;
                }
 
                rbo->placements[c].fpfn = 0;
+               rbo->placements[c].mem_type = TTM_PL_VRAM;
                rbo->placements[c++].flags = TTM_PL_FLAG_WC |
-                                            TTM_PL_FLAG_UNCACHED |
-                                            TTM_PL_FLAG_VRAM;
+                                            TTM_PL_FLAG_UNCACHED;
        }
 
        if (domain & RADEON_GEM_DOMAIN_GTT) {
                if (rbo->flags & RADEON_GEM_GTT_UC) {
                        rbo->placements[c].fpfn = 0;
-                       rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED |
-                               TTM_PL_FLAG_TT;
+                       rbo->placements[c].mem_type = TTM_PL_TT;
+                       rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED;
 
                } else if ((rbo->flags & RADEON_GEM_GTT_WC) ||
                           (rbo->rdev->flags & RADEON_IS_AGP)) {
                        rbo->placements[c].fpfn = 0;
+                       rbo->placements[c].mem_type = TTM_PL_TT;
                        rbo->placements[c++].flags = TTM_PL_FLAG_WC |
-                               TTM_PL_FLAG_UNCACHED |
-                               TTM_PL_FLAG_TT;
+                               TTM_PL_FLAG_UNCACHED;
                } else {
                        rbo->placements[c].fpfn = 0;
-                       rbo->placements[c++].flags = TTM_PL_FLAG_CACHED |
-                                                    TTM_PL_FLAG_TT;
+                       rbo->placements[c].mem_type = TTM_PL_TT;
+                       rbo->placements[c++].flags = TTM_PL_FLAG_CACHED;
                }
        }
 
        if (domain & RADEON_GEM_DOMAIN_CPU) {
                if (rbo->flags & RADEON_GEM_GTT_UC) {
                        rbo->placements[c].fpfn = 0;
-                       rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED |
-                               TTM_PL_FLAG_SYSTEM;
+                       rbo->placements[c].mem_type = TTM_PL_SYSTEM;
+                       rbo->placements[c++].flags = TTM_PL_FLAG_UNCACHED;
 
                } else if ((rbo->flags & RADEON_GEM_GTT_WC) ||
                    rbo->rdev->flags & RADEON_IS_AGP) {
                        rbo->placements[c].fpfn = 0;
+                       rbo->placements[c].mem_type = TTM_PL_SYSTEM;
                        rbo->placements[c++].flags = TTM_PL_FLAG_WC |
-                               TTM_PL_FLAG_UNCACHED |
-                               TTM_PL_FLAG_SYSTEM;
+                               TTM_PL_FLAG_UNCACHED;
                } else {
                        rbo->placements[c].fpfn = 0;
-                       rbo->placements[c++].flags = TTM_PL_FLAG_CACHED |
-                                                    TTM_PL_FLAG_SYSTEM;
+                       rbo->placements[c].mem_type = TTM_PL_SYSTEM;
+                       rbo->placements[c++].flags = TTM_PL_FLAG_CACHED;
                }
        }
        if (!c) {
                rbo->placements[c].fpfn = 0;
-               rbo->placements[c++].flags = TTM_PL_MASK_CACHING |
-                                            TTM_PL_FLAG_SYSTEM;
+               rbo->placements[c].mem_type = TTM_PL_SYSTEM;
+               rbo->placements[c++].flags = TTM_PL_MASK_CACHING;
        }
 
        rbo->placement.num_placement = c;
@@ -171,7 +171,7 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
 
        for (i = 0; i < c; ++i) {
                if ((rbo->flags & RADEON_GEM_CPU_ACCESS) &&
-                   (rbo->placements[i].flags & TTM_PL_FLAG_VRAM) &&
+                   (rbo->placements[i].mem_type == TTM_PL_VRAM) &&
                    !rbo->placements[i].fpfn)
                        rbo->placements[i].lpfn =
                                rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
@@ -360,7 +360,7 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset,
        radeon_ttm_placement_from_domain(bo, domain);
        for (i = 0; i < bo->placement.num_placement; i++) {
                /* force to pin into visible video ram */
-               if ((bo->placements[i].flags & TTM_PL_FLAG_VRAM) &&
+               if ((bo->placements[i].mem_type == TTM_PL_VRAM) &&
                    !(bo->flags & RADEON_GEM_NO_CPU_ACCESS) &&
                    (!max_offset || max_offset > bo->rdev->mc.visible_vram_size))
                        bo->placements[i].lpfn =
@@ -824,7 +824,7 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
        lpfn =  rdev->mc.visible_vram_size >> PAGE_SHIFT;
        for (i = 0; i < rbo->placement.num_placement; i++) {
                /* Force into visible VRAM */
-               if ((rbo->placements[i].flags & TTM_PL_FLAG_VRAM) &&
+               if ((rbo->placements[i].mem_type == TTM_PL_VRAM) &&
                    (!rbo->placements[i].lpfn || rbo->placements[i].lpfn > lpfn))
                        rbo->placements[i].lpfn = lpfn;
        }

diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 0612d3b311ad34d7e5b60953ffdf455e968c8707..602a591a53dc71aa1339ccdbd1e15a461151a6f2 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -88,7 +88,8 @@ static void radeon_evict_flags(struct ttm_buffer_object *bo,
        static const struct ttm_place placements = {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM
+               .mem_type = TTM_PL_SYSTEM,
+               .flags = TTM_PL_MASK_CACHING
        };
 
        struct radeon_bo *rbo;
@@ -119,7 +120,7 @@ static void radeon_evict_flags(struct ttm_buffer_object *bo,
                                                         RADEON_GEM_DOMAIN_GTT);
                        rbo->placement.num_busy_placement = 0;
                        for (i = 0; i < rbo->placement.num_placement; i++) {
-                               if (rbo->placements[i].flags & TTM_PL_FLAG_VRAM) {
+                               if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
                                        if (rbo->placements[i].fpfn < fpfn)
                                                rbo->placements[i].fpfn = fpfn;
                                } else {
@@ -224,7 +225,8 @@ static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
        placement.busy_placement = &placements;
        placements.fpfn = 0;
        placements.lpfn = 0;
-       placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
+       placements.mem_type = TTM_PL_TT;
+       placements.flags = TTM_PL_MASK_CACHING;
        r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
        if (unlikely(r)) {
                return r;
@@ -269,7 +271,8 @@ static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
        placement.busy_placement = &placements;
        placements.fpfn = 0;
        placements.lpfn = 0;
-       placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
+       placements.mem_type = TTM_PL_TT;
+       placements.flags = TTM_PL_MASK_CACHING;
        r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
        if (unlikely(r)) {
                return r;

diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index c93de7fab7395a13c8b65ff365852d96c863d90e..e2bfe3a13c63d71096710f67b9ee991c9b654707 100644 (file)
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -64,34 +64,18 @@ static void ttm_bo_default_destroy(struct ttm_buffer_object *bo)
        kfree(bo);
 }
 
-static inline int ttm_mem_type_from_place(const struct ttm_place *place,
-                                         uint32_t *mem_type)
-{
-       int pos;
-
-       pos = ffs(place->flags & TTM_PL_MASK_MEM);
-       if (unlikely(!pos))
-               return -EINVAL;
-
-       *mem_type = pos - 1;
-       return 0;
-}
-
 static void ttm_bo_mem_space_debug(struct ttm_buffer_object *bo,
                                        struct ttm_placement *placement)
 {
        struct drm_printer p = drm_debug_printer(TTM_PFX);
-       int i, ret, mem_type;
        struct ttm_resource_manager *man;
+       int i, mem_type;
 
        drm_printf(&p, "No space for %p (%lu pages, %luK, %luM)\n",
                   bo, bo->mem.num_pages, bo->mem.size >> 10,
                   bo->mem.size >> 20);
        for (i = 0; i < placement->num_placement; i++) {
-               ret = ttm_mem_type_from_place(&placement->placement[i],
-                                               &mem_type);
-               if (ret)
-                       return;
+               mem_type = placement->placement[i].mem_type;
                drm_printf(&p, "  placement[%d]=0x%08X (%d)\n",
                           i, placement->placement[i].flags, mem_type);
                man = ttm_manager_type(bo->bdev, mem_type);
@@ -125,12 +109,6 @@ static struct kobj_type ttm_bo_glob_kobj_type  = {
        .default_attrs = ttm_bo_global_attrs
 };
 
-
-static inline uint32_t ttm_bo_type_flags(unsigned type)
-{
-       return 1 << (type);
-}
-
 static void ttm_bo_add_mem_to_lru(struct ttm_buffer_object *bo,
                                  struct ttm_resource *mem)
 {
@@ -910,25 +888,6 @@ static uint32_t ttm_bo_select_caching(struct ttm_resource_manager *man,
        return result;
 }
 
-static bool ttm_bo_mt_compatible(struct ttm_resource_manager *man,
-                                uint32_t mem_type,
-                                const struct ttm_place *place,
-                                uint32_t *masked_placement)
-{
-       uint32_t cur_flags = ttm_bo_type_flags(mem_type);
-
-       if ((cur_flags & place->flags & TTM_PL_MASK_MEM) == 0)
-               return false;
-
-       if ((place->flags & man->available_caching) == 0)
-               return false;
-
-       cur_flags |= (place->flags & man->available_caching);
-
-       *masked_placement = cur_flags;
-       return true;
-}
-
 /**
  * ttm_bo_mem_placement - check if placement is compatible
  * @bo: BO to find memory for
@@ -946,30 +905,21 @@ static int ttm_bo_mem_placement(struct ttm_buffer_object *bo,
                                struct ttm_operation_ctx *ctx)
 {
        struct ttm_bo_device *bdev = bo->bdev;
-       uint32_t mem_type = TTM_PL_SYSTEM;
        struct ttm_resource_manager *man;
        uint32_t cur_flags = 0;
-       int ret;
 
-       ret = ttm_mem_type_from_place(place, &mem_type);
-       if (ret)
-               return ret;
-
-       man = ttm_manager_type(bdev, mem_type);
+       man = ttm_manager_type(bdev, place->mem_type);
        if (!man || !ttm_resource_manager_used(man))
                return -EBUSY;
 
-       if (!ttm_bo_mt_compatible(man, mem_type, place, &cur_flags))
+       if ((place->flags & man->available_caching) == 0)
                return -EBUSY;
 
+       cur_flags = place->flags & man->available_caching;
        cur_flags = ttm_bo_select_caching(man, bo->mem.placement, cur_flags);
-       /*
-        * Use the access and other non-mapping-related flag bits from
-        * the memory placement flags to the current flags
-        */
-       ttm_flag_masked(&cur_flags, place->flags, ~TTM_PL_MASK_MEMTYPE);
+       cur_flags |= place->flags & ~TTM_PL_MASK_CACHING;
 
-       mem->mem_type = mem_type;
+       mem->mem_type = place->mem_type;
        mem->placement = cur_flags;
 
        spin_lock(&ttm_bo_glob.lru_lock);
@@ -1006,10 +956,8 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
                struct ttm_resource_manager *man;
 
                ret = ttm_bo_mem_placement(bo, place, mem, ctx);
-               if (ret == -EBUSY)
-                       continue;
                if (ret)
-                       goto error;
+                       continue;
 
                type_found = true;
                ret = ttm_resource_alloc(bo, place, mem);
@@ -1034,10 +982,8 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
                const struct ttm_place *place = &placement->busy_placement[i];
 
                ret = ttm_bo_mem_placement(bo, place, mem, ctx);
-               if (ret == -EBUSY)
-                       continue;
                if (ret)
-                       goto error;
+                       continue;
 
                type_found = true;
                ret = ttm_bo_mem_force_space(bo, place, mem, ctx);
@@ -1108,7 +1054,7 @@ static bool ttm_bo_places_compat(const struct ttm_place *places,
 
                *new_flags = heap->flags;
                if ((*new_flags & mem->placement & TTM_PL_MASK_CACHING) &&
-                   (*new_flags & mem->placement & TTM_PL_MASK_MEM) &&
+                   (mem->mem_type == heap->mem_type) &&
                    (!(*new_flags & TTM_PL_FLAG_CONTIGUOUS) ||
                     (mem->placement & TTM_PL_FLAG_CONTIGUOUS)))
                        return true;
@@ -1163,12 +1109,8 @@ int ttm_bo_validate(struct ttm_buffer_object *bo,
                if (ret)
                        return ret;
        } else {
-               /*
-                * Use the access and other non-mapping-related flag bits from
-                * the compatible memory placement flags to the active flags
-                */
-               ttm_flag_masked(&bo->mem.placement, new_flags,
-                               ~TTM_PL_MASK_MEMTYPE);
+               bo->mem.placement &= TTM_PL_MASK_CACHING;
+               bo->mem.placement |= new_flags & ~TTM_PL_MASK_CACHING;
        }
        /*
         * We might need to add a TTM.
@@ -1236,7 +1178,7 @@ int ttm_bo_init_reserved(struct ttm_bo_device *bdev,
        bo->mem.bus.offset = 0;
        bo->mem.bus.addr = NULL;
        bo->moving = NULL;
-       bo->mem.placement = (TTM_PL_FLAG_SYSTEM | TTM_PL_FLAG_CACHED);
+       bo->mem.placement = TTM_PL_FLAG_CACHED;
        bo->acc_size = acc_size;
        bo->sg = sg;
        if (resv) {
@@ -1627,7 +1569,7 @@ int ttm_bo_swapout(struct ttm_bo_global *glob, struct ttm_operation_ctx *ctx)
 
                evict_mem = bo->mem;
                evict_mem.mm_node = NULL;
-               evict_mem.placement = TTM_PL_FLAG_SYSTEM | TTM_PL_FLAG_CACHED;
+               evict_mem.placement = TTM_PL_FLAG_CACHED;
                evict_mem.mem_type = TTM_PL_SYSTEM;
 
                ret = ttm_bo_handle_move_mem(bo, &evict_mem, true, &ctx);

diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
index 5ac8da43238bece10beedb23e8b67491567b4475..1b56432dfa4385125510ba76550b789fd8f53674 100644 (file)
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -69,8 +69,6 @@ int ttm_bo_move_ttm(struct ttm_buffer_object *bo,
 
                ttm_tt_unbind(bo->bdev, ttm);
                ttm_bo_free_old_node(bo);
-               ttm_flag_masked(&old_mem->placement, TTM_PL_FLAG_SYSTEM,
-                               TTM_PL_MASK_MEM);
                old_mem->mem_type = TTM_PL_SYSTEM;
        }
 

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
index 03f5660d85a44806282868392deb48d738f720cd..813f1b14809415fa78eae62128677dc2832ca485 100644 (file)
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
@@ -354,6 +354,7 @@ void vmw_bo_pin_reserved(struct vmw_buffer_object *vbo, bool pin)
 
        pl.fpfn = 0;
        pl.lpfn = 0;
+       pl.mem_type = bo->mem.mem_type;
        pl.flags = bo->mem.placement;
        if (pin)
                pl.flags |= TTM_PL_FLAG_NO_EVICT;

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index 871ad738dadbdb90ba5a63f98c6455e343771cc3..1523b51a7284c03928195c67063db5ab96762f8d 100644 (file)
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -82,9 +82,7 @@
                        VMWGFX_NUM_GB_SCREEN_TARGET)
 
 #define VMW_PL_GMR (TTM_PL_PRIV + 0)
-#define VMW_PL_FLAG_GMR (TTM_PL_FLAG_PRIV << 0)
 #define VMW_PL_MOB (TTM_PL_PRIV + 1)
-#define VMW_PL_FLAG_MOB (TTM_PL_FLAG_PRIV << 1)
 
 #define VMW_RES_CONTEXT ttm_driver_type0
 #define VMW_RES_SURFACE ttm_driver_type1

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
index 9d62e57fcb8de6da0bed46cf1118c8b682902f04..03aa0fc5e753c0c27b3040e8eb00edc9e349e1ef 100644 (file)
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
@@ -33,49 +33,57 @@
 static const struct ttm_place vram_placement_flags = {
        .fpfn = 0,
        .lpfn = 0,
-       .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED
+       .mem_type = TTM_PL_VRAM,
+       .flags = TTM_PL_FLAG_CACHED
 };
 
 static const struct ttm_place vram_ne_placement_flags = {
        .fpfn = 0,
        .lpfn = 0,
-       .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT
+       .mem_type = TTM_PL_VRAM,
+       .flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT
 };
 
 static const struct ttm_place sys_placement_flags = {
        .fpfn = 0,
        .lpfn = 0,
-       .flags = TTM_PL_FLAG_SYSTEM | TTM_PL_FLAG_CACHED
+       .mem_type = TTM_PL_SYSTEM,
+       .flags = TTM_PL_FLAG_CACHED
 };
 
 static const struct ttm_place sys_ne_placement_flags = {
        .fpfn = 0,
        .lpfn = 0,
-       .flags = TTM_PL_FLAG_SYSTEM | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT
+       .mem_type = TTM_PL_SYSTEM,
+       .flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT
 };
 
 static const struct ttm_place gmr_placement_flags = {
        .fpfn = 0,
        .lpfn = 0,
-       .flags = VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED
+       .mem_type = VMW_PL_GMR,
+       .flags = TTM_PL_FLAG_CACHED
 };
 
 static const struct ttm_place gmr_ne_placement_flags = {
        .fpfn = 0,
        .lpfn = 0,
-       .flags = VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT
+       .mem_type = VMW_PL_GMR,
+       .flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT
 };
 
 static const struct ttm_place mob_placement_flags = {
        .fpfn = 0,
        .lpfn = 0,
-       .flags = VMW_PL_FLAG_MOB | TTM_PL_FLAG_CACHED
+       .mem_type = VMW_PL_MOB,
+       .flags = TTM_PL_FLAG_CACHED
 };
 
 static const struct ttm_place mob_ne_placement_flags = {
        .fpfn = 0,
        .lpfn = 0,
-       .flags = VMW_PL_FLAG_MOB | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT
+       .mem_type = VMW_PL_MOB,
+       .flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT
 };
 
 struct ttm_placement vmw_vram_placement = {
@@ -89,11 +97,13 @@ static const struct ttm_place vram_gmr_placement_flags[] = {
        {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED
+               .mem_type = TTM_PL_VRAM,
+               .flags = TTM_PL_FLAG_CACHED
        }, {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED
+               .mem_type = VMW_PL_GMR,
+               .flags = TTM_PL_FLAG_CACHED
        }
 };
 
@@ -101,11 +111,13 @@ static const struct ttm_place gmr_vram_placement_flags[] = {
        {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED
+               .mem_type = VMW_PL_GMR,
+               .flags = TTM_PL_FLAG_CACHED
        }, {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED
+               .mem_type = TTM_PL_VRAM,
+               .flags = TTM_PL_FLAG_CACHED
        }
 };
 
@@ -120,12 +132,14 @@ static const struct ttm_place vram_gmr_ne_placement_flags[] = {
        {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED |
+               .mem_type = TTM_PL_VRAM,
+               .flags = TTM_PL_FLAG_CACHED |
                         TTM_PL_FLAG_NO_EVICT
        }, {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED |
+               .mem_type = VMW_PL_GMR,
+               .flags = TTM_PL_FLAG_CACHED |
                         TTM_PL_FLAG_NO_EVICT
        }
 };
@@ -169,19 +183,23 @@ static const struct ttm_place evictable_placement_flags[] = {
        {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = TTM_PL_FLAG_SYSTEM | TTM_PL_FLAG_CACHED
+               .mem_type = TTM_PL_SYSTEM,
+               .flags = TTM_PL_FLAG_CACHED
        }, {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED
+               .mem_type = TTM_PL_VRAM,
+               .flags = TTM_PL_FLAG_CACHED
        }, {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED
+               .mem_type = VMW_PL_GMR,
+               .flags = TTM_PL_FLAG_CACHED
        }, {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = VMW_PL_FLAG_MOB | TTM_PL_FLAG_CACHED
+               .mem_type = VMW_PL_MOB,
+               .flags = TTM_PL_FLAG_CACHED
        }
 };
 
@@ -189,15 +207,18 @@ static const struct ttm_place nonfixed_placement_flags[] = {
        {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = TTM_PL_FLAG_SYSTEM | TTM_PL_FLAG_CACHED
+               .mem_type = TTM_PL_SYSTEM,
+               .flags = TTM_PL_FLAG_CACHED
        }, {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED
+               .mem_type = VMW_PL_GMR,
+               .flags = TTM_PL_FLAG_CACHED
        }, {
                .fpfn = 0,
                .lpfn = 0,
-               .flags = VMW_PL_FLAG_MOB | TTM_PL_FLAG_CACHED
+               .mem_type = VMW_PL_MOB,
+               .flags = TTM_PL_FLAG_CACHED
        }
 };
 

diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h
index 32c0651cc0fd68c6c0e7f38b7914fd4af7515b86..303a89d1066d09d980b726da86bae34654b3a473 100644 (file)
--- a/include/drm/ttm/ttm_bo_driver.h
+++ b/include/drm/ttm/ttm_bo_driver.h
@@ -393,23 +393,6 @@ struct ttm_lru_bulk_move {
        struct ttm_lru_bulk_move_pos swap[TTM_MAX_BO_PRIORITY];
 };
 
-/**
- * ttm_flag_masked
- *
- * @old: Pointer to the result and original value.
- * @new: New value of bits.
- * @mask: Mask of bits to change.
- *
- * Convenience function to change a number of bits identified by a mask.
- */
-
-static inline uint32_t
-ttm_flag_masked(uint32_t *old, uint32_t new, uint32_t mask)
-{
-       *old ^= (*old ^ new) & mask;
-       return *old;
-}
-
 /*
  * ttm_bo.c
  */

diff --git a/include/drm/ttm/ttm_placement.h b/include/drm/ttm/ttm_placement.h
index e88a8e39767bf5adc4941441581cd50496cfbf33..d4022655eae40650c2d0b47ac90ef85991fcaa14 100644 (file)
--- a/include/drm/ttm/ttm_placement.h
+++ b/include/drm/ttm/ttm_placement.h
@@ -42,12 +42,6 @@
 #define TTM_PL_VRAM             2
 #define TTM_PL_PRIV             3
 
-#define TTM_PL_FLAG_SYSTEM      (1 << TTM_PL_SYSTEM)
-#define TTM_PL_FLAG_TT          (1 << TTM_PL_TT)
-#define TTM_PL_FLAG_VRAM        (1 << TTM_PL_VRAM)
-#define TTM_PL_FLAG_PRIV        (1 << TTM_PL_PRIV)
-#define TTM_PL_MASK_MEM         0x0000FFFF
-
 /*
  * Other flags that affects data placement.
  * TTM_PL_FLAG_CACHED indicates cache-coherent mappings
@@ -71,8 +65,6 @@
                                 TTM_PL_FLAG_UNCACHED | \
                                 TTM_PL_FLAG_WC)
 
-#define TTM_PL_MASK_MEMTYPE     (TTM_PL_MASK_MEM | TTM_PL_MASK_CACHING)
-
 /**
  * struct ttm_place
  *
@@ -85,6 +77,7 @@
 struct ttm_place {
        unsigned        fpfn;
        unsigned        lpfn;
+       uint32_t        mem_type;
        uint32_t        flags;
 };