* c-pch.c (get_ident): Avoid C++ keywords.
* combine-stack-adj.c (single_set_for_csa): Likewise.
* final.c (asm_insn_count, final_scan_insn, alter_subreg,
output_asm_insn): Likewise.
* reload.c (push_secondary_reload, find_reusable_reload,
push_reload, combine_reloads, find_reloads,
debug_reload_to_stream): Likewise.
* reload.h (struct reload): Likewise.
* reload1.c (reload_reg_class_lower, find_reg, find_reload_regs,
allocate_reload_reg, choose_reload_regs, emit_input_reload_insns,
emit_output_reload_insns): Likewise.
* targhooks.c (default_secondary_reload): Likewise.
* varasm.c (section_entry_eq, object_block_entry_eq): Likewise.
From-SVN: r137895
2008-07-16 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+ * c-pch.c (get_ident): Avoid C++ keywords.
+ * combine-stack-adj.c (single_set_for_csa): Likewise.
+ * final.c (asm_insn_count, final_scan_insn, alter_subreg,
+ output_asm_insn): Likewise.
+ * reload.c (push_secondary_reload, find_reusable_reload,
+ push_reload, combine_reloads, find_reloads,
+ debug_reload_to_stream): Likewise.
+ * reload.h (struct reload): Likewise.
+ * reload1.c (reload_reg_class_lower, find_reg, find_reload_regs,
+ allocate_reload_reg, choose_reload_regs, emit_input_reload_insns,
+ emit_output_reload_insns): Likewise.
+ * targhooks.c (default_secondary_reload): Likewise.
+ * varasm.c (section_entry_eq, object_block_entry_eq): Likewise.
+
+2008-07-16 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
* recog.c (validate_change_1, validate_change,
validate_unshare_change, validate_replace_rtx_1, struct
funny_match, constrain_operands, peephole2_optimize): Avoid C++
get_ident (void)
{
static char result[IDENT_LENGTH];
- static const char template[IDENT_LENGTH] = "gpch.013";
+ static const char templ[IDENT_LENGTH] = "gpch.013";
static const char c_language_chars[] = "Co+O";
- memcpy (result, template, IDENT_LENGTH);
+ memcpy (result, templ, IDENT_LENGTH);
result[4] = c_language_chars[c_language];
return result;
for (i = 1; i < XVECLEN (tmp, 0); ++i)
{
- rtx this = XVECEXP (tmp, 0, i);
+ rtx this_rtx = XVECEXP (tmp, 0, i);
/* The special case is allowing a no-op set. */
- if (GET_CODE (this) == SET
- && SET_SRC (this) == SET_DEST (this))
+ if (GET_CODE (this_rtx) == SET
+ && SET_SRC (this_rtx) == SET_DEST (this_rtx))
;
- else if (GET_CODE (this) != CLOBBER
- && GET_CODE (this) != USE)
+ else if (GET_CODE (this_rtx) != CLOBBER
+ && GET_CODE (this_rtx) != USE)
return NULL_RTX;
}
static int
asm_insn_count (rtx body)
{
- const char *template;
+ const char *templ;
int count = 1;
if (GET_CODE (body) == ASM_INPUT)
- template = XSTR (body, 0);
+ templ = XSTR (body, 0);
else
- template = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
+ templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
- if (!*template)
+ if (!*templ)
return 0;
- for (; *template; template++)
- if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template, template)
- || *template == '\n')
+ for (; *templ; templ++)
+ if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
+ || *templ == '\n')
count++;
return count;
{
rtx body = PATTERN (insn);
int insn_code_number;
- const char *template;
+ const char *templ;
#ifdef HAVE_conditional_execution
/* Reset this early so it is correct for ASM statements. */
#endif
/* Find the proper template for this insn. */
- template = get_insn_template (insn_code_number, insn);
+ templ = get_insn_template (insn_code_number, insn);
/* If the C code returns 0, it means that it is a jump insn
which follows a deleted test insn, and that test insn
needs to be reinserted. */
- if (template == 0)
+ if (templ == 0)
{
rtx prev;
/* If the template is the string "#", it means that this insn must
be split. */
- if (template[0] == '#' && template[1] == '\0')
+ if (templ[0] == '#' && templ[1] == '\0')
{
- rtx new = try_split (body, insn, 0);
+ rtx new_rtx = try_split (body, insn, 0);
/* If we didn't split the insn, go away. */
- if (new == insn && PATTERN (new) == body)
+ if (new_rtx == insn && PATTERN (new_rtx) == body)
fatal_insn ("could not split insn", insn);
#ifdef HAVE_ATTR_length
gcc_unreachable ();
#endif
- return new;
+ return new_rtx;
}
#ifdef TARGET_UNWIND_INFO
#endif
/* Output assembler code from the template. */
- output_asm_insn (template, recog_data.operand);
+ output_asm_insn (templ, recog_data.operand);
/* If necessary, report the effect that the instruction has on
the unwind info. We've already done this for delay slots
}
else
{
- rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
+ rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
SUBREG_BYTE (x));
- if (new != 0)
- *xp = new;
+ if (new_rtx != 0)
+ *xp = new_rtx;
else if (REG_P (y))
{
/* Simplify_subreg can't handle some REG cases, but we have to. */
of the operand, with no other punctuation. */
void
-output_asm_insn (const char *template, rtx *operands)
+output_asm_insn (const char *templ, rtx *operands)
{
const char *p;
int c;
/* An insn may return a null string template
in a case where no assembler code is needed. */
- if (*template == 0)
+ if (*templ == 0)
return;
memset (opoutput, 0, sizeof opoutput);
- p = template;
+ p = templ;
putc ('\t', asm_out_file);
#ifdef ASM_OUTPUT_OPCODE
/* See if we can reuse an existing secondary reload. */
for (s_reload = 0; s_reload < n_reloads; s_reload++)
if (rld[s_reload].secondary_p
- && (reg_class_subset_p (rclass, rld[s_reload].class)
- || reg_class_subset_p (rld[s_reload].class, rclass))
+ && (reg_class_subset_p (rclass, rld[s_reload].rclass)
+ || reg_class_subset_p (rld[s_reload].rclass, rclass))
&& ((in_p && rld[s_reload].inmode == mode)
|| (! in_p && rld[s_reload].outmode == mode))
&& ((in_p && rld[s_reload].secondary_in_reload == t_reload)
if (! in_p)
rld[s_reload].outmode = mode;
- if (reg_class_subset_p (rclass, rld[s_reload].class))
- rld[s_reload].class = rclass;
+ if (reg_class_subset_p (rclass, rld[s_reload].rclass))
+ rld[s_reload].rclass = rclass;
rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
rld[s_reload].optional &= optional;
/* We need to make a new secondary reload for this register class. */
rld[s_reload].in = rld[s_reload].out = 0;
- rld[s_reload].class = rclass;
+ rld[s_reload].rclass = rclass;
rld[s_reload].inmode = in_p ? mode : VOIDmode;
rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
than we otherwise would. */
for (i = 0; i < n_reloads; i++)
- if ((reg_class_subset_p (rclass, rld[i].class)
- || reg_class_subset_p (rld[i].class, rclass))
+ if ((reg_class_subset_p (rclass, rld[i].rclass)
+ || reg_class_subset_p (rld[i].rclass, rclass))
/* If the existing reload has a register, it must fit our class. */
&& (rld[i].reg_rtx == 0
|| TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
the preincrementation as happening before any ref in this insn
to that register. */
for (i = 0; i < n_reloads; i++)
- if ((reg_class_subset_p (rclass, rld[i].class)
- || reg_class_subset_p (rld[i].class, rclass))
+ if ((reg_class_subset_p (rclass, rld[i].rclass)
+ || reg_class_subset_p (rld[i].rclass, rclass))
/* If the existing reload has a register, it must fit our
class. */
&& (rld[i].reg_rtx == 0
i = n_reloads;
rld[i].in = in;
rld[i].out = out;
- rld[i].class = rclass;
+ rld[i].rclass = rclass;
rld[i].inmode = inmode;
rld[i].outmode = outmode;
rld[i].reg_rtx = 0;
rld[i].out = out;
rld[i].out_reg = outloc ? *outloc : 0;
}
- if (reg_class_subset_p (rclass, rld[i].class))
- rld[i].class = rclass;
+ if (reg_class_subset_p (rclass, rld[i].rclass))
+ rld[i].rclass = rclass;
rld[i].optional &= optional;
if (MERGE_TO_OTHER (type, rld[i].when_needed,
opnum, rld[i].opnum))
{
rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
inmode, outmode,
- rld[i].class, i,
+ rld[i].rclass, i,
earlyclobber_operand_p (out));
/* If the outgoing register already contains the same value
&& rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
&& rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
&& rld[i].when_needed != RELOAD_OTHER
- && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
- == CLASS_MAX_NREGS (rld[output_reload].class,
+ && (CLASS_MAX_NREGS (rld[i].rclass, rld[i].inmode)
+ == CLASS_MAX_NREGS (rld[output_reload].rclass,
rld[output_reload].outmode))
&& rld[i].inc == 0
&& rld[i].reg_rtx == 0
secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
#endif
&& (SMALL_REGISTER_CLASSES
- ? (rld[i].class == rld[output_reload].class)
- : (reg_class_subset_p (rld[i].class,
- rld[output_reload].class)
- || reg_class_subset_p (rld[output_reload].class,
- rld[i].class)))
+ ? (rld[i].rclass == rld[output_reload].rclass)
+ : (reg_class_subset_p (rld[i].rclass,
+ rld[output_reload].rclass)
+ || reg_class_subset_p (rld[output_reload].rclass,
+ rld[i].rclass)))
&& (MATCHES (rld[i].in, rld[output_reload].out)
/* Args reversed because the first arg seems to be
the one that we imagine being modified
rld[output_reload].out))))
&& ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
rld[i].when_needed != RELOAD_FOR_INPUT)
- && (reg_class_size[(int) rld[i].class]
+ && (reg_class_size[(int) rld[i].rclass]
|| SMALL_REGISTER_CLASSES)
/* We will allow making things slightly worse by combining an
input and an output, but no worse than that. */
= secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
#endif
/* If required, minimize the register class. */
- if (reg_class_subset_p (rld[output_reload].class,
- rld[i].class))
- rld[i].class = rld[output_reload].class;
+ if (reg_class_subset_p (rld[output_reload].rclass,
+ rld[i].rclass))
+ rld[i].rclass = rld[output_reload].rclass;
/* Transfer all replacements from the old reload to the combined. */
for (j = 0; j < n_replacements; j++)
rld[output_reload].out)
&& (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
&& HARD_REGNO_MODE_OK (regno, rld[output_reload].outmode)
- && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
+ && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
regno)
&& (hard_regno_nregs[regno][rld[output_reload].outmode]
<= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))])
won't want this register. */
&& ((secondary_out = rld[output_reload].secondary_out_reload) == -1
|| (!(TEST_HARD_REG_BIT
- (reg_class_contents[(int) rld[secondary_out].class], regno))
+ (reg_class_contents[(int) rld[secondary_out].rclass], regno))
&& ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
|| !(TEST_HARD_REG_BIT
- (reg_class_contents[(int) rld[secondary_out].class],
+ (reg_class_contents[(int) rld[secondary_out].rclass],
regno)))))
&& !fixed_regs[regno]
/* Check that a former pseudo is valid; see find_dummy_reload. */
&& rld[i].out == 0)
{
rld[i].reg_rtx
- = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
+ = find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
static_reload_reg_p, 0, rld[i].inmode);
/* Prevent generation of insn to load the value
because the one we found already has the value. */
if (i != j && rld[j].in != 0 && rld[j].out == 0
&& rld[j].when_needed == rld[i].when_needed
&& MATCHES (rld[i].in, rld[j].in)
- && rld[i].class == rld[j].class
+ && rld[i].rclass == rld[j].rclass
&& !rld[i].nocombine && !rld[j].nocombine
&& rld[i].reg_rtx == rld[j].reg_rtx)
{
> GET_MODE_SIZE (rld[i].inmode)))
? rld[i].outmode : rld[i].inmode;
- rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
+ rld[i].nregs = CLASS_MAX_NREGS (rld[i].rclass, rld[i].mode);
}
/* Special case a simple move with an input reload and a
unsigned int regno = REGNO (dest);
if (regno < FIRST_PSEUDO_REGISTER
- && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
+ && TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
&& HARD_REGNO_MODE_OK (regno, rld[i].mode))
{
int nr = hard_regno_nregs[regno][rld[i].mode];
int ok = 1, nri;
for (nri = 1; nri < nr; nri ++)
- if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
+ if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
ok = 0;
if (ok)
fprintf (f, "\n\t");
}
- fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
+ fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
fprintf (f, "%s (opnum = %d)",
reload_when_needed_name[(int) rld[r].when_needed],
rtx out;
/* The class of registers to reload into. */
- enum reg_class class;
+ enum reg_class rclass;
/* The mode this operand should have when reloaded, on input. */
enum machine_mode inmode;
return t;
/* Count all solitary classes before non-solitary ones. */
- t = ((reg_class_size[(int) rld[r2].class] == 1)
- - (reg_class_size[(int) rld[r1].class] == 1));
+ t = ((reg_class_size[(int) rld[r2].rclass] == 1)
+ - (reg_class_size[(int) rld[r1].rclass] == 1));
if (t != 0)
return t;
return t;
/* Consider reloads in order of increasing reg-class number. */
- t = (int) rld[r1].class - (int) rld[r2].class;
+ t = (int) rld[r1].rclass - (int) rld[r2].rclass;
if (t != 0)
return t;
COPY_HARD_REG_SET (not_usable, bad_spill_regs);
IOR_HARD_REG_SET (not_usable, bad_spill_regs_global);
- IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->class]);
+ IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->rclass]);
CLEAR_HARD_REG_SET (used_by_other_reload);
for (k = 0; k < order; k++)
{
if (dump_file)
fprintf (dump_file, "reload failure for reload %d\n", r);
- spill_failure (chain->insn, rld[r].class);
+ spill_failure (chain->insn, rld[r].rclass);
failure = 1;
return;
}
for (count = 0; count < n_spills; count++)
{
- int rclass = (int) rld[r].class;
+ int rclass = (int) rld[r].rclass;
int regnum;
i++;
{
max_group_size = MAX (rld[j].nregs, max_group_size);
group_class
- = reg_class_superunion[(int) rld[j].class][(int) group_class];
+ = reg_class_superunion[(int) rld[j].rclass][(int) group_class];
}
save_reload_reg_rtx[j] = rld[j].reg_rtx;
#endif
)
{
- enum reg_class rclass = rld[r].class, last_class;
+ enum reg_class rclass = rld[r].rclass, last_class;
rtx last_reg = reg_last_reload_reg[regno];
enum machine_mode need_mode;
bad_for_class = 0;
for (k = 0; k < nr; k++)
- bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].class],
+ bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].rclass],
i+k);
/* We found a register that contains the
|| REG_P (rld[r].in)
|| MEM_P (rld[r].in))
&& (rld[r].nregs == max_group_size
- || ! reg_classes_intersect_p (rld[r].class, group_class)))
+ || ! reg_classes_intersect_p (rld[r].rclass, group_class)))
search_equiv = rld[r].in;
/* If this is an output reload from a simple move insn, look
if an equivalence for the input is available. */
if (search_equiv)
{
rtx equiv
- = find_equiv_reg (search_equiv, insn, rld[r].class,
+ = find_equiv_reg (search_equiv, insn, rld[r].rclass,
-1, NULL, 0, rld[r].mode);
int regno = 0;
{
regs_used |= TEST_HARD_REG_BIT (reload_reg_used_at_all,
i);
- bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].class],
+ bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].rclass],
i);
}
|| rld[s].optional)
continue;
- if ((rld[s].class != rld[r].class
- && reg_classes_intersect_p (rld[r].class,
- rld[s].class))
+ if ((rld[s].rclass != rld[r].rclass
+ && reg_classes_intersect_p (rld[r].rclass,
+ rld[s].rclass))
|| rld[s].nregs < rld[r].nregs)
break;
}
sri.icode = CODE_FOR_nothing;
sri.prev_sri = NULL;
- new_class = targetm.secondary_reload (1, real_oldequiv, rl->class,
+ new_class = targetm.secondary_reload (1, real_oldequiv, rl->rclass,
mode, &sri);
if (new_class == NO_REGS && sri.icode == CODE_FOR_nothing)
&& reg_equiv_mem[REGNO (old)] != 0)
real_old = reg_equiv_mem[REGNO (old)];
- if (secondary_reload_class (0, rl->class, mode, real_old) != NO_REGS)
+ if (secondary_reload_class (0, rl->rclass, mode, real_old) != NO_REGS)
{
rtx second_reloadreg = reloadreg;
reloadreg = rld[secondary_reload].reg_rtx;
enum machine_mode reload_mode ATTRIBUTE_UNUSED,
secondary_reload_info *sri)
{
- enum reg_class class = NO_REGS;
+ enum reg_class rclass = NO_REGS;
if (sri->prev_sri && sri->prev_sri->t_icode != CODE_FOR_nothing)
{
}
#ifdef SECONDARY_INPUT_RELOAD_CLASS
if (in_p)
- class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
+ rclass = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
#endif
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
if (! in_p)
- class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
+ rclass = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
#endif
- if (class != NO_REGS)
+ if (rclass != NO_REGS)
{
enum insn_code icode = (in_p ? reload_in_optab[(int) reload_mode]
: reload_out_optab[(int) reload_mode]);
if (reg_class_subset_p (reload_class, insn_class))
{
- gcc_assert (scratch_class == class);
- class = NO_REGS;
+ gcc_assert (scratch_class == rclass);
+ rclass = NO_REGS;
}
else
- class = insn_class;
+ rclass = insn_class;
}
- if (class == NO_REGS)
+ if (rclass == NO_REGS)
sri->icode = icode;
else
sri->t_icode = icode;
}
- return class;
+ return rclass;
}
bool
section_entry_eq (const void *p1, const void *p2)
{
const section *old = (const section *) p1;
- const char *new = (const char *) p2;
+ const char *new_name = (const char *) p2;
- return strcmp (old->named.name, new) == 0;
+ return strcmp (old->named.name, new_name) == 0;
}
static hashval_t
object_block_entry_eq (const void *p1, const void *p2)
{
const struct object_block *old = (const struct object_block *) p1;
- const section *new = (const section *) p2;
+ const section *new_section = (const section *) p2;
- return old->sect == new;
+ return old->sect == new_section;
}
static hashval_t
projects / platform / upstream / gcc.git / commitdiff