riscv:linux:drm:mipidsi
authorshengyang.chen <shengyang.chen@starfivetech.com>
Thu, 14 Jul 2022 03:47:22 +0000 (11:47 +0800)
committerJianlong Huang <jianlong.huang@starfivetech.com>
Thu, 3 Nov 2022 09:23:26 +0000 (17:23 +0800)
update dphy reg config for visionfive2 board

Signed-off-by:shengyang.chen<shengyang.chen@starfivetech.com>

drivers/phy/m31/phy-m31-dphy-tx0.c

index b043f95..c104a29 100755 (executable)
@@ -580,11 +580,11 @@ static int sys_m31_dphy_tx_configure(struct phy *phy, union phy_configure_opts *
                                                        CFG_L0_SWAP_SEL_SHIFT, CFG_L0_SWAP_SEL_MASK);//Lane setting
                        sf_dphy_set_reg(dphy->topsys, 0x1,
                                                        CFG_L1_SWAP_SEL_SHIFT, CFG_L1_SWAP_SEL_MASK);
-                       sf_dphy_set_reg(dphy->topsys, 0x4,
-                                                       CFG_L2_SWAP_SEL_SHIFT, CFG_L2_SWAP_SEL_MASK);
                        sf_dphy_set_reg(dphy->topsys, 0x2,
-                                                       CFG_L3_SWAP_SEL_SHIFT, CFG_L3_SWAP_SEL_MASK);
+                                                       CFG_L2_SWAP_SEL_SHIFT, CFG_L2_SWAP_SEL_MASK);
                        sf_dphy_set_reg(dphy->topsys, 0x3,
+                                                       CFG_L3_SWAP_SEL_SHIFT, CFG_L3_SWAP_SEL_MASK);
+                       sf_dphy_set_reg(dphy->topsys, 0x4,
                                                        CFG_L4_SWAP_SEL_SHIFT, CFG_L4_SWAP_SEL_MASK);
                        //PLL setting
                        sf_dphy_set_reg(dphy->topsys + 0x1c, 0x0,
@@ -742,11 +742,11 @@ static int sf_dphy_probe(struct platform_device *pdev)
        dev_info(dphy->dev, "control ECO\n");
 
        //mipi_pmic setting
-       dphy->mipitx_1p8 = devm_regulator_get(&pdev->dev, "mipitx_1p8");
+       dphy->mipitx_1p8 = devm_regulator_get(&pdev->dev, "mipi_1p8");
        if (IS_ERR(dphy->mipitx_1p8))
                return PTR_ERR(dphy->mipitx_1p8);
 
-       dphy->mipitx_0p9 = devm_regulator_get(&pdev->dev, "mipitx_0p9");
+       dphy->mipitx_0p9 = devm_regulator_get(&pdev->dev, "mipi_0p9");
        if (IS_ERR(dphy->mipitx_0p9))
                return PTR_ERR(dphy->mipitx_0p9);