arm: Use arm_cmpdi_unsigned for thumb2 as well

This changes code generation from "eors; eors; orrs" (which ranges
from 6 to 12 bytes and requires three scratch registers), to
"cmp; it; cmp" (which is always 6 bytes for register inputs and
requires no scratch registers).

        * config/arm/arm.md (*arm_cmpdi_unsigned): Enable for thumb2.
        * config/arm/arm.c (arm_select_cc_mode): Use it.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182561 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4b4d10f..f5ec754 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2011-12-20  Richard Henderson  <rth@redhat.com>
+
+       * config/arm/arm.md (*arm_cmpdi_unsigned): Enable for thumb2.
+       * config/arm/arm.c (arm_select_cc_mode): Use it.
+
 2011-12-20  Richard Sandiford  <rdsandiford@googlemail.com>
 
        * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index b6d619e..b682a9f 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -11672,7 +11672,7 @@ arm_select_cc_mode (enum rtx_code op, rtx x, rtx y)
            return CC_Zmode;
 
          /* We can do an equality test in three Thumb instructions.  */
-         if (!TARGET_ARM)
+         if (!TARGET_32BIT)
            return CC_Zmode;
 
          /* FALLTHROUGH */
@@ -11684,7 +11684,7 @@ arm_select_cc_mode (enum rtx_code op, rtx x, rtx y)
          /* DImode unsigned comparisons can be implemented by cmp +
             cmpeq without a scratch register.  Not worth doing in
             Thumb-2.  */
-         if (TARGET_ARM)
+         if (TARGET_32BIT)
            return CC_CZmode;
 
          /* FALLTHROUGH */

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 1b2d9d9..a5b1df6 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -7541,8 +7541,8 @@
   [(set (reg:CC_CZ CC_REGNUM)
        (compare:CC_CZ (match_operand:DI 0 "s_register_operand" "r")
                       (match_operand:DI 1 "arm_di_operand"     "rDi")))]
-  "TARGET_ARM"
-  "cmp%?\\t%R0, %R1\;cmpeq\\t%Q0, %Q1"
+  "TARGET_32BIT"
+  "cmp\\t%R0, %R1\;it eq\;cmpeq\\t%Q0, %Q1"
   [(set_attr "conds" "set")
    (set_attr "length" "8")]
 )