[JumpThreading] Add tests that have a cast of freeze and vice versa

diff --git a/llvm/test/Transforms/JumpThreading/freeze.ll b/llvm/test/Transforms/JumpThreading/freeze.ll
index 3c6aa98..e08aabf 100644 (file)
--- a/llvm/test/Transforms/JumpThreading/freeze.ll
+++ b/llvm/test/Transforms/JumpThreading/freeze.ll
@@ -49,6 +49,98 @@ F2:
   ret i32 %B
 }
 
+define i32 @test1_cast(i1 %cond) {
+; CHECK-LABEL: @test1_cast(
+; CHECK-NEXT:    br i1 [[COND:%.*]], label [[T1:%.*]], label [[F1:%.*]]
+; CHECK:       T1:
+; CHECK-NEXT:    [[V1:%.*]] = call i32 @f1()
+; CHECK-NEXT:    br label [[MERGE:%.*]]
+; CHECK:       F1:
+; CHECK-NEXT:    [[V2:%.*]] = call i32 @f2()
+; CHECK-NEXT:    br label [[MERGE]]
+; CHECK:       Merge:
+; CHECK-NEXT:    [[A0:%.*]] = phi i32 [ 1, [[T1]] ], [ 0, [[F1]] ]
+; CHECK-NEXT:    [[B:%.*]] = phi i32 [ [[V1]], [[T1]] ], [ [[V2]], [[F1]] ]
+; CHECK-NEXT:    [[A:%.*]] = trunc i32 [[A0]] to i1
+; CHECK-NEXT:    [[A_FR:%.*]] = freeze i1 [[A]]
+; CHECK-NEXT:    br i1 [[A_FR]], label [[T2:%.*]], label [[F2:%.*]]
+; CHECK:       T2:
+; CHECK-NEXT:    call void @f3()
+; CHECK-NEXT:    ret i32 [[B]]
+; CHECK:       F2:
+; CHECK-NEXT:    ret i32 [[B]]
+;
+  br i1 %cond, label %T1, label %F1
+
+T1:
+  %v1 = call i32 @f1()
+  br label %Merge
+
+F1:
+  %v2 = call i32 @f2()
+  br label %Merge
+
+Merge:
+  %A0 = phi i32 [1, %T1], [0, %F1]
+  %B = phi i32 [%v1, %T1], [%v2, %F1]
+  %A = trunc i32 %A0 to i1
+  %A.fr = freeze i1 %A
+  br i1 %A.fr, label %T2, label %F2
+
+T2:
+  call void @f3()
+  ret i32 %B
+
+F2:
+  ret i32 %B
+}
+
+define i32 @test1_cast2(i1 %cond) {
+; CHECK-LABEL: @test1_cast2(
+; CHECK-NEXT:    br i1 [[COND:%.*]], label [[T1:%.*]], label [[F1:%.*]]
+; CHECK:       T1:
+; CHECK-NEXT:    [[V1:%.*]] = call i32 @f1()
+; CHECK-NEXT:    br label [[MERGE:%.*]]
+; CHECK:       F1:
+; CHECK-NEXT:    [[V2:%.*]] = call i32 @f2()
+; CHECK-NEXT:    br label [[MERGE]]
+; CHECK:       Merge:
+; CHECK-NEXT:    [[A0:%.*]] = phi i32 [ 1, [[T1]] ], [ 0, [[F1]] ]
+; CHECK-NEXT:    [[B:%.*]] = phi i32 [ [[V1]], [[T1]] ], [ [[V2]], [[F1]] ]
+; CHECK-NEXT:    [[A0_FR:%.*]] = freeze i32 [[A0]]
+; CHECK-NEXT:    [[A_FR:%.*]] = trunc i32 [[A0_FR]] to i1
+; CHECK-NEXT:    br i1 [[A_FR]], label [[T2:%.*]], label [[F2:%.*]]
+; CHECK:       T2:
+; CHECK-NEXT:    call void @f3()
+; CHECK-NEXT:    ret i32 [[B]]
+; CHECK:       F2:
+; CHECK-NEXT:    ret i32 [[B]]
+;
+  br i1 %cond, label %T1, label %F1
+
+T1:
+  %v1 = call i32 @f1()
+  br label %Merge
+
+F1:
+  %v2 = call i32 @f2()
+  br label %Merge
+
+Merge:
+  %A0 = phi i32 [1, %T1], [0, %F1]
+  %B = phi i32 [%v1, %T1], [%v2, %F1]
+  %A0.fr = freeze i32 %A0
+  %A.fr = trunc i32 %A0.fr to i1
+  br i1 %A.fr, label %T2, label %F2
+
+T2:
+  call void @f3()
+  ret i32 %B
+
+F2:
+  ret i32 %B
+}
+
 define i32 @test1_undef(i1 %cond) {
 ; CHECK-LABEL: @test1_undef(
 ; CHECK-NEXT:    br i1 [[COND:%.*]], label [[T1:%.*]], label [[F1:%.*]]