sh.opt (menable-tas): Rename to mtas.

	* config/sh/sh.opt (menable-tas): Rename to mtas.
	* doc/invoke.texi (SH options): Likewise.
	* config/sh/sync.md: Update comments.

From-SVN: r190782

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a9c6078c0761a21e7d5b54fd3dbd794d00cc18e9..31e8f1372c2075620925da7a9a91024364a665c3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2012-08-29  Oleg Endo  <olegendo@gcc.gnu.org>
+
+       * config/sh/sh.opt (menable-tas): Rename to mtas.
+       * doc/invoke.texi (SH options): Likewise.
+       * config/sh/sync.md: Update comments.
+
 2012-08-29  Oleg Endo  <olegendo@gcc.gnu.org>
 
        * config/sh/iterators.md: New file.

diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt
index 70b7e09721fa16b6fabcaea1413cf5a1568ea3b5..cb01810619bb89cd366e10d41d391987541395f1 100644 (file)
--- a/gcc/config/sh/sh.opt
+++ b/gcc/config/sh/sh.opt
@@ -327,7 +327,7 @@ mhard-atomic
 Target Report Var(TARGET_HARD_ATOMIC)
 Use hardware atomic sequences
 
-menable-tas
+mtas
 Target Report RejectNegative Var(TARGET_ENABLE_TAS)
 Use tas.b instruction for __atomic_test_and_set
 

diff --git a/gcc/config/sh/sync.md b/gcc/config/sh/sync.md
index 24ed5e9faceaa7abe23cea0f1553d1517f2ab303..aa87c57c765335d7daba29a3678592a89a1845cb 100644 (file)
--- a/gcc/config/sh/sync.md
+++ b/gcc/config/sh/sync.md
@@ -26,11 +26,11 @@
 ;; In addition to that all SH CPUs support the 'tas.b' instruction, which
 ;; can be optionally used to implement the 'atomic_test_and_set' builtin.
 ;;
-;; tas.b atomic_test_and_set (-menable-tas)
+;; tas.b atomic_test_and_set (-mtas)
 ;;
 ;; Depending on the particular hardware configuration, usage of the 'tas.b'
 ;; instruction might be undesired or even unsafe.  Thus, it has to be
-;; enabled by the user explicitely.  If it is not enabled, the
+;; enabled by the user explicitly.  If it is not enabled, the
 ;; 'atomic_test_and_set' builtin is implemented either with hardware or with
 ;; software atomics, depending on which is enabled.  It is also possible to
 ;; enable the 'tas.b' instruction only, without enabling support for the 

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index bf7844ded29d6d9bae70ccf1fc1265ddbd8bbccb..876beaa9c92b9c9f8bab744c71d7e0acec29678f 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -891,7 +891,7 @@ See RS/6000 and PowerPC Options.
 -maccumulate-outgoing-args -minvalid-symbols -msoft-atomic -mhard-atomic @gol
 -mbranch-cost=@var{num} -mzdcbranch -mno-zdcbranch -mcbranchdi -mcmpeqdi @gol
 -mfused-madd -mno-fused-madd -mfsca -mno-fsca -mfsrra -mno-fsrra @gol
--mpretend-cmove -menable-tas}
+-mpretend-cmove -mtas}
 
 @emph{Solaris 2 Options}
 @gccoptlist{-mimpure-text  -mno-impure-text @gol
@@ -18156,8 +18156,8 @@ interrupt / exception handling systems.  In contrast to the
 @option{-msoft-atomic} option this will only use the instructions
 @code{movli.l} and @code{movco.l} to create atomic sequences.
 
-@item -menable-tas
-@opindex menable-tas
+@item -mtas
+@opindex mtas
 Generate the @code{tas.b} opcode for @code{__atomic_test_and_set}.
 Notice that depending on the particular hardware and software configuration
 this can degrade overall performance due to the operand cache line flushes