#include <stdint.h>
#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-void
+static void
intel_clflush_range(void *start, size_t size)
{
void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);
#define CACHELINE_MASK 63
#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-void intel_clflush_range(void *start, size_t size);
void intel_flush_range(void *start, size_t size);
void intel_invalidate_range(void *start, size_t size);
#endif
#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
if (device->physical->memory.need_flush)
- intel_clflush_range(batch.start, batch.next - batch.start);
+ intel_flush_range(batch.start, batch.next - batch.start);
#endif
return VK_SUCCESS;
if (map_offset >= mem->map_size)
continue;
- intel_clflush_range(mem->map + map_offset,
- MIN2(pMemoryRanges[i].size,
- mem->map_size - map_offset));
+ intel_flush_range(mem->map + map_offset,
+ MIN2(pMemoryRanges[i].size,
+ mem->map_size - map_offset));
}
#endif
return VK_SUCCESS;
memset(bo->map, 0, bo->size);
#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
if (device->physical->memory.need_flush)
- intel_clflush_range(bo->map, bo->size);
+ intel_flush_range(bo->map, bo->size);
#endif
return bo;
device->debug_frame_desc->frame_id++;
#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
if (device->physical->memory.need_flush) {
- intel_clflush_range(device->debug_frame_desc,
+ intel_flush_range(device->debug_frame_desc,
sizeof(*device->debug_frame_desc));
}
#endif
anv_batch_emit(&batch, GFX7_MI_NOOP, noop);
if (device->physical->memory.need_flush)
- intel_clflush_range(batch.start, batch.next - batch.start);
+ intel_flush_range(batch.start, batch.next - batch.start);
return VK_SUCCESS;
}
if (map_offset >= mem->map_size)
continue;
- intel_clflush_range(mem->map + map_offset,
- MIN2(pMemoryRanges[i].size,
- mem->map_size - map_offset));
+ intel_flush_range(mem->map + map_offset,
+ MIN2(pMemoryRanges[i].size,
+ mem->map_size - map_offset));
}
return VK_SUCCESS;
if (device->debug_frame_desc) {
device->debug_frame_desc->frame_id++;
if (device->physical->memory.need_flush) {
- intel_clflush_range(device->debug_frame_desc,
+ intel_flush_range(device->debug_frame_desc,
sizeof(*device->debug_frame_desc));
}
}