intel/vec4: Don't use legacy write mask

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>

diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index 28d3a13..f4dd649 100644 (file)
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -1084,7 +1084,7 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
    nir_alu_type dst_type = (nir_alu_type) (nir_op_infos[instr->op].output_type |
                                            nir_dest_bit_size(instr->dest.dest));
    dst_reg dst = get_nir_dest(instr->dest.dest, dst_type);
-   dst.writemask &= instr->dest.write_mask;
+   dst.writemask &= nir_component_mask(nir_dest_num_components(instr->dest.dest));
 
    src_reg op[4];
    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {