[AMDGPU][GFX9][DOC][NFC] Update assembler syntax description

Summary of changes:
- Updated MUBUF lds syntax (see https://reviews.llvm.org/D124485).
- Updated SMEM syntax (see https://reviews.llvm.org/D127314).
- Enabled src0=literal for v_madak*, v_madmk* (see https://reviews.llvm.org/D111067).
- Removed SYSMSG_OP_HOST_TRAP_ACK message.
- Minor bug fixing and improvements.

diff --git a/llvm/docs/AMDGPU/AMDGPUAsmGFX9.rst b/llvm/docs/AMDGPU/AMDGPUAsmGFX9.rst
index e343d14..de9ba2f 100644 (file)
--- a/llvm/docs/AMDGPU/AMDGPUAsmGFX9.rst
+++ b/llvm/docs/AMDGPU/AMDGPUAsmGFX9.rst
@@ -32,774 +32,774 @@ Instructions
 
 
 DS
------------------------
+--
 
 .. parsed-literal::
 
     **INSTRUCTION**                    **DST**         **SRC0**      **SRC1**      **SRC2**           **MODIFIERS**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    ds_add_f32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_add_rtn_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_add_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_add_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_add_src2_f32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_add_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_add_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_add_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_add_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_and_b32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_and_b64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_and_rtn_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_and_rtn_b64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_and_src2_b32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_and_src2_b64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_append                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`                                           :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_bpermute_b32                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>`
-    ds_cmpst_b32                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_cmpst_b64                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_1>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_cmpst_f32                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_cmpst_f64                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_1>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_cmpst_rtn_b32               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_cmpst_rtn_b64               :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_1>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_cmpst_rtn_f32               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_cmpst_rtn_f64               :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_1>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_condxchg32_rtn_b64          :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_consume                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`                                           :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_dec_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_dec_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_dec_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_dec_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_dec_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_dec_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_gws_barrier                             :ref:`vdata<amdgpu_synid_gfx9_vdata>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_gws_init                                :ref:`vdata<amdgpu_synid_gfx9_vdata>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_gws_sema_br                             :ref:`vdata<amdgpu_synid_gfx9_vdata>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_add_f32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_add_rtn_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_add_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_add_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_add_src2_f32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_add_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_add_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_add_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_add_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_and_b32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_and_b64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_and_rtn_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_and_rtn_b64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_and_src2_b32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_and_src2_b64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_append                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`                                           :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_bpermute_b32                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>`
+    ds_cmpst_b32                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_6802ce>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_6802ce>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_cmpst_b64                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_fd235e>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_fd235e>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_cmpst_f32                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_6802ce>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_6802ce>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_cmpst_f64                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_fd235e>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_fd235e>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_cmpst_rtn_b32               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_6802ce>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_6802ce>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_cmpst_rtn_b64               :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_fd235e>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_fd235e>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_cmpst_rtn_f32               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_6802ce>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_6802ce>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_cmpst_rtn_f64               :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_fd235e>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_fd235e>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_condxchg32_rtn_b64          :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_consume                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`                                           :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_dec_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_dec_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_dec_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_dec_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_dec_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_dec_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_gws_barrier                             :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_gws_init                                :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_gws_sema_br                             :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
     ds_gws_sema_p                                                                 :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
     ds_gws_sema_release_all                                                       :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
     ds_gws_sema_v                                                                 :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_inc_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_inc_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_inc_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_inc_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_inc_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_inc_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_f32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_f64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_i32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_i64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_rtn_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_rtn_f64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_rtn_i32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_rtn_i64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_src2_f32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_src2_f64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_src2_i32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_src2_i64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_max_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_f32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_f64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_i32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_i64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_rtn_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_rtn_f64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_rtn_i32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_rtn_i64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_src2_f32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_src2_f64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_src2_i32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_src2_i64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_min_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_mskor_b32                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_mskor_b64                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_1>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_mskor_rtn_b32               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_mskor_rtn_b64               :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_1>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_inc_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_inc_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_inc_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_inc_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_inc_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_inc_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_f32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_f64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_i32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_i64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_rtn_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_rtn_f64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_rtn_i32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_rtn_i64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_src2_f32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_src2_f64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_src2_i32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_src2_i64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_max_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_f32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_f64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_i32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_i64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_rtn_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_rtn_f64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_rtn_i32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_rtn_i64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_src2_f32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_src2_f64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_src2_i32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_src2_i64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_min_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_mskor_b32                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_6802ce>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_6802ce>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_mskor_b64                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_fd235e>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_fd235e>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_mskor_rtn_b32               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_6802ce>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_6802ce>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_mskor_rtn_b64               :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_fd235e>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_fd235e>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
     ds_nop
-    ds_or_b32                                  :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_or_b64                                  :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_or_rtn_b32                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_or_rtn_b64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_or_src2_b32                             :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_or_src2_b64                             :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_ordered_count               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_permute_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>`
-    ds_read2_b32                   :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read2_b64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read2st64_b32               :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read2st64_b64               :ref:`vdst<amdgpu_synid_gfx9_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_addtid_b32             :ref:`vdst<amdgpu_synid_gfx9_vdst>`                                           :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_b128                   :ref:`vdst<amdgpu_synid_gfx9_vdst_2>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_b32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_b64                    :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_b96                    :ref:`vdst<amdgpu_synid_gfx9_vdst_3>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_i16                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_i8                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_i8_d16                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_i8_d16_hi              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_u16                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_u16_d16                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_u16_d16_hi             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_u8                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_u8_d16                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_read_u8_d16_hi              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_rsub_rtn_u32                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_rsub_rtn_u64                :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_rsub_src2_u32                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_rsub_src2_u64                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_rsub_u32                                :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_rsub_u64                                :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_sub_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_sub_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_sub_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_sub_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_sub_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_sub_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_swizzle_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`pattern<amdgpu_synid_sw_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_wrap_rtn_b32                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write2_b32                              :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write2_b64                              :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_1>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_1>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write2st64_b32                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write2st64_b64                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_1>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_1>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write_addtid_b32                        :ref:`vdata<amdgpu_synid_gfx9_vdata>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write_b128                              :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_2>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write_b16                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write_b16_d16_hi                        :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write_b32                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write_b64                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write_b8                                :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write_b8_d16_hi                         :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write_b96                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_3>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write_src2_b32                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_write_src2_b64                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_wrxchg2_rtn_b32             :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_wrxchg2_rtn_b64             :ref:`vdst<amdgpu_synid_gfx9_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_1>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_1>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_wrxchg2st64_rtn_b32         :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_wrxchg2st64_rtn_b64         :ref:`vdst<amdgpu_synid_gfx9_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_1>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_1>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
-    ds_wrxchg_rtn_b32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_wrxchg_rtn_b64              :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_xor_b32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_xor_b64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_xor_rtn_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_xor_rtn_b64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_xor_src2_b32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
-    ds_xor_src2_b64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_or_b32                                  :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_or_b64                                  :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_or_rtn_b32                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_or_rtn_b64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_or_src2_b32                             :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_or_src2_b64                             :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_ordered_count               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_permute_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>`
+    ds_read2_b32                   :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read2_b64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_69a144>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read2st64_b32               :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read2st64_b64               :ref:`vdst<amdgpu_synid_gfx9_vdst_69a144>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_addtid_b32             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`                                           :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_b128                   :ref:`vdst<amdgpu_synid_gfx9_vdst_69a144>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_b32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_b64                    :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_b96                    :ref:`vdst<amdgpu_synid_gfx9_vdst_48e42f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_i16                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_i8                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_i8_d16                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_i8_d16_hi              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_u16                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_u16_d16                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_u16_d16_hi             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_u8                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_u8_d16                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_read_u8_d16_hi              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_rsub_rtn_u32                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_rsub_rtn_u64                :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_rsub_src2_u32                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_rsub_src2_u64                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_rsub_u32                                :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_rsub_u64                                :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_sub_rtn_u32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_sub_rtn_u64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_sub_src2_u32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_sub_src2_u64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_sub_u32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_sub_u64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_swizzle_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`pattern<amdgpu_synid_sw_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_wrap_rtn_b32                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_6802ce>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_6802ce>`         :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write2_b32                              :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_6802ce>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_6802ce>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write2_b64                              :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_fd235e>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_fd235e>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write2st64_b32                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_6802ce>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_6802ce>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write2st64_b64                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_fd235e>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_fd235e>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write_addtid_b32                        :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write_b128                              :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_e016a1>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write_b16                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write_b16_d16_hi                        :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write_b32                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write_b64                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write_b8                                :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write_b8_d16_hi                         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write_b96                               :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_56f215>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write_src2_b32                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_write_src2_b64                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_wrxchg2_rtn_b32             :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_6802ce>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_6802ce>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_wrxchg2_rtn_b64             :ref:`vdst<amdgpu_synid_gfx9_vdst_69a144>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_fd235e>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_fd235e>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_wrxchg2st64_rtn_b32         :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_6802ce>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_6802ce>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_wrxchg2st64_rtn_b64         :ref:`vdst<amdgpu_synid_gfx9_vdst_69a144>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata0<amdgpu_synid_gfx9_vdata0_fd235e>`,   :ref:`vdata1<amdgpu_synid_gfx9_vdata1_fd235e>`         :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+    ds_wrxchg_rtn_b32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_wrxchg_rtn_b64              :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_xor_b32                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_xor_b64                                 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_xor_rtn_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_xor_rtn_b64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                    :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_xor_src2_b32                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+    ds_xor_src2_b64                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`                              :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
 
 EXP
------------------------
+---
 
 .. parsed-literal::
 
     **INSTRUCTION**                    **DST**       **SRC0**      **SRC1**      **SRC2**      **SRC3**           **MODIFIERS**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    exp                            :ref:`tgt<amdgpu_synid_gfx9_tgt>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc>`,    :ref:`vsrc2<amdgpu_synid_gfx9_vsrc>`,    :ref:`vsrc3<amdgpu_synid_gfx9_vsrc>`          :ref:`done<amdgpu_synid_done>` :ref:`compr<amdgpu_synid_compr>` :ref:`vm<amdgpu_synid_vm>`
+    exp                            :ref:`tgt<amdgpu_synid_gfx9_tgt>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_533a4e>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_533a4e>`,    :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_533a4e>`,    :ref:`vsrc3<amdgpu_synid_gfx9_vsrc_533a4e>`          :ref:`done<amdgpu_synid_done>` :ref:`compr<amdgpu_synid_compr>` :ref:`vm<amdgpu_synid_vm>`
 
 FLAT
------------------------
+----
 
 .. parsed-literal::
 
     **INSTRUCTION**                    **DST**           **SRC0**      **SRC1**         **SRC2**           **MODIFIERS**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    flat_atomic_add                :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_add_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_and                :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_and_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_cmpswap            :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_cmpswap_x2         :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_2>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_dec                :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_dec_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_inc                :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_inc_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_or                 :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_or_x2              :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_smax               :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_smax_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_smin               :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_smin_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_sub                :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_sub_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_swap               :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_swap_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_umax               :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_umax_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_umin               :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_umin_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_xor                :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_atomic_xor_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_dword                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_dwordx2              :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_dwordx3              :ref:`vdst<amdgpu_synid_gfx9_vdst_3>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_dwordx4              :ref:`vdst<amdgpu_synid_gfx9_vdst_2>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_sbyte                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_sbyte_d16            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_sbyte_d16_hi         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_short_d16            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_short_d16_hi         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_sshort               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_ubyte                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_ubyte_d16            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_ubyte_d16_hi         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_load_ushort               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_store_byte                              :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_store_byte_d16_hi                       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_store_dword                             :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_store_dwordx2                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_store_dwordx3                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_3>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_store_dwordx4                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_2>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_store_short                             :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    flat_store_short_d16_hi                      :ref:`vaddr<amdgpu_synid_gfx9_vaddr_1>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_add              :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_add_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_and              :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_and_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_cmpswap          :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_cmpswap_x2       :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_2>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_dec              :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_dec_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_inc              :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_inc_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_or               :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_or_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_smax             :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_smax_x2          :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_smin             :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_smin_x2          :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_sub              :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_sub_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_swap             :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_swap_x2          :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_umax             :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_umax_x2          :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_umin             :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_umin_x2          :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_xor              :ref:`vdst<amdgpu_synid_gfx9_vdst_4>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_atomic_xor_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_5>`::ref:`opt<amdgpu_synid_gfx9_opt>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_dword              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_dwordx2            :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_dwordx3            :ref:`vdst<amdgpu_synid_gfx9_vdst_3>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_dwordx4            :ref:`vdst<amdgpu_synid_gfx9_vdst_2>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_sbyte              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_sbyte_d16          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_sbyte_d16_hi       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_short_d16          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_short_d16_hi       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_sshort             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_ubyte              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_ubyte_d16          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_ubyte_d16_hi       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_load_ushort             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_store_byte                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_store_byte_d16_hi                     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_store_dword                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_store_dwordx2                         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_store_dwordx3                         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_3>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_store_dwordx4                         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_2>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_store_short                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    global_store_short_d16_hi                    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_dword             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_dwordx2           :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_dwordx3           :ref:`vdst<amdgpu_synid_gfx9_vdst_3>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_dwordx4           :ref:`vdst<amdgpu_synid_gfx9_vdst_2>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_sbyte             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_sbyte_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_sbyte_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_short_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_short_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_sshort            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_ubyte             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_ubyte_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_ubyte_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_load_ushort            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_store_byte                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_store_byte_d16_hi                    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_store_dword                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_store_dwordx2                        :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_store_dwordx3                        :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_3>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_store_dwordx4                        :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_2>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_store_short                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    scratch_store_short_d16_hi                   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_1>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_add                :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_add_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_and                :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_and_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_cmpswap            :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_cmpswap_x2         :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_e016a1>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_dec                :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_dec_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_inc                :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_inc_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_or                 :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_or_x2              :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_smax               :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_smax_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_smin               :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_smin_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_sub                :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_sub_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_swap               :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_swap_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_umax               :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_umax_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_umin               :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_umin_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`                   :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_xor                :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_atomic_xor_x2             :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_dword                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_dwordx2              :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_dwordx3              :ref:`vdst<amdgpu_synid_gfx9_vdst_48e42f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_dwordx4              :ref:`vdst<amdgpu_synid_gfx9_vdst_69a144>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_sbyte                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_sbyte_d16            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_sbyte_d16_hi         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_short_d16            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_short_d16_hi         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_sshort               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_ubyte                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_ubyte_d16            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_ubyte_d16_hi         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_load_ushort               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`                                 :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_store_byte                              :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_store_byte_d16_hi                       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_store_dword                             :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_store_dwordx2                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_store_dwordx3                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_56f215>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_store_dwordx4                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_e016a1>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_store_short                             :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    flat_store_short_d16_hi                      :ref:`vaddr<amdgpu_synid_gfx9_vaddr_9f7133>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`                       :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_add              :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_add_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_and              :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_and_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_cmpswap          :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_cmpswap_x2       :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_e016a1>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_dec              :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_dec_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_inc              :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_inc_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_or               :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_or_x2            :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_smax             :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_smax_x2          :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_smin             :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_smin_x2          :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_sub              :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_sub_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_swap             :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_swap_x2          :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_umax             :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_umax_x2          :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_umin             :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_umin_x2          :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_xor              :ref:`vdst<amdgpu_synid_gfx9_vdst_d0dc43>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_atomic_xor_x2           :ref:`vdst<amdgpu_synid_gfx9_vdst_463513>`::ref:`opt<amdgpu_synid_gfx9_opt_847aed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_dword              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_dwordx2            :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_dwordx3            :ref:`vdst<amdgpu_synid_gfx9_vdst_48e42f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_dwordx4            :ref:`vdst<amdgpu_synid_gfx9_vdst_69a144>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_sbyte              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_sbyte_d16          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_sbyte_d16_hi       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_short_d16          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_short_d16_hi       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_sshort             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_ubyte              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_ubyte_d16          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_ubyte_d16_hi       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_load_ushort             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_store_byte                            :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_store_byte_d16_hi                     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_store_dword                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_store_dwordx2                         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_store_dwordx3                         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_56f215>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_store_dwordx4                         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_e016a1>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_store_short                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    global_store_short_d16_hi                    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_dword             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_dwordx2           :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_dwordx3           :ref:`vdst<amdgpu_synid_gfx9_vdst_48e42f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_dwordx4           :ref:`vdst<amdgpu_synid_gfx9_vdst_69a144>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_sbyte             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_sbyte_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_sbyte_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_short_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_short_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_sshort            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_ubyte             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_ubyte_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_ubyte_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_load_ushort            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,         :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`                       :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_store_byte                           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_store_byte_d16_hi                    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_store_dword                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_store_dwordx2                        :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_store_dwordx3                        :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_56f215>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_store_dwordx4                        :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_e016a1>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_store_short                          :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    scratch_store_short_d16_hi                   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>`,    :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,       :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>`          :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
 
 MIMG
------------------------
+----
 
 .. parsed-literal::
 
     **INSTRUCTION**                **DST**      **SRC0**       **SRC1**     **SRC2**      **MODIFIERS**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    image_atomic_add                    :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_and                    :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_cmpswap                :ref:`vdata<amdgpu_synid_gfx9_vdata_5>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_dec                    :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_inc                    :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_or                     :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_smax                   :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_smin                   :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_sub                    :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_swap                   :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_umax                   :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_umin                   :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_atomic_xor                    :ref:`vdata<amdgpu_synid_gfx9_vdata_4>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_gather4              :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_b            :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_b_cl         :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_b_cl_o       :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_b_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c            :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c_b          :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c_b_cl       :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c_b_cl_o     :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c_b_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c_cl         :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c_cl_o       :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c_l          :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c_l_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c_lz         :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c_lz_o       :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_c_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_cl           :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_cl_o         :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_l            :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_l_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_lz           :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_lz_o         :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_gather4_o            :ref:`vdst<amdgpu_synid_gfx9_vdst_6>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_get_lod              :ref:`vdst<amdgpu_synid_gfx9_vdst_7>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_get_resinfo          :ref:`vdst<amdgpu_synid_gfx9_vdst_7>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_load                 :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_load_mip             :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_load_mip_pck         :ref:`vdst<amdgpu_synid_gfx9_vdst_7>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_load_mip_pck_sgn     :ref:`vdst<amdgpu_synid_gfx9_vdst_7>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_load_pck             :ref:`vdst<amdgpu_synid_gfx9_vdst_7>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_load_pck_sgn         :ref:`vdst<amdgpu_synid_gfx9_vdst_7>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_sample               :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_b             :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_b_cl          :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_b_cl_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_b_o           :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c             :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_b           :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_b_cl        :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_b_cl_o      :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_b_o         :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_cd          :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_cd_cl       :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_cd_cl_o     :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_cd_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_cl          :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_cl_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_d           :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_d_cl        :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_d_cl_o      :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_d_o         :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_l           :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_l_o         :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_lz          :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_lz_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_c_o           :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_cd            :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_cd_cl         :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_cd_cl_o       :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_cd_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_cl            :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_cl_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_d             :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_d_cl          :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_d_cl_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_d_o           :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_l             :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_l_o           :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_lz            :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_lz_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_sample_o             :ref:`vdst<amdgpu_synid_gfx9_vdst_8>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_store                         :ref:`vdata<amdgpu_synid_gfx9_vdata_6>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_store_mip                     :ref:`vdata<amdgpu_synid_gfx9_vdata_6>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
-    image_store_mip_pck                 :ref:`vdata<amdgpu_synid_gfx9_vdata_7>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
-    image_store_pck                     :ref:`vdata<amdgpu_synid_gfx9_vdata_7>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_4>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_add                    :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_and                    :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_cmpswap                :ref:`vdata<amdgpu_synid_gfx9_vdata_a9ff5a>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_dec                    :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_inc                    :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_or                     :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_smax                   :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_smin                   :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_sub                    :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_swap                   :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_umax                   :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_umin                   :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_atomic_xor                    :ref:`vdata<amdgpu_synid_gfx9_vdata_35851e>`::ref:`dst<amdgpu_synid_gfx9_dst>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_gather4              :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_b            :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_b_cl         :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_b_cl_o       :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_b_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c            :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c_b          :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c_b_cl       :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c_b_cl_o     :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c_b_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c_cl         :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c_cl_o       :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c_l          :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c_l_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c_lz         :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c_lz_o       :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_c_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_cl           :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_cl_o         :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_l            :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_l_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_lz           :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_lz_o         :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_gather4_o            :ref:`vdst<amdgpu_synid_gfx9_vdst_2ea017>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_get_lod              :ref:`vdst<amdgpu_synid_gfx9_vdst_3d7dcf>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_get_resinfo          :ref:`vdst<amdgpu_synid_gfx9_vdst_3d7dcf>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_load                 :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_load_mip             :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_load_mip_pck         :ref:`vdst<amdgpu_synid_gfx9_vdst_3d7dcf>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_load_mip_pck_sgn     :ref:`vdst<amdgpu_synid_gfx9_vdst_3d7dcf>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_load_pck             :ref:`vdst<amdgpu_synid_gfx9_vdst_3d7dcf>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_load_pck_sgn         :ref:`vdst<amdgpu_synid_gfx9_vdst_3d7dcf>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`              :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_sample               :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_b             :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_b_cl          :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_b_cl_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_b_o           :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c             :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_b           :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_b_cl        :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_b_cl_o      :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_b_o         :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_cd          :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_cd_cl       :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_cd_cl_o     :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_cd_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_cl          :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_cl_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_d           :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_d_cl        :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_d_cl_o      :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_d_o         :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_l           :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_l_o         :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_lz          :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_lz_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_c_o           :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_cd            :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_cd_cl         :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_cd_cl_o       :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_cd_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_cl            :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_cl_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_d             :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_d_cl          :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_d_cl_o        :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_d_o           :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_l             :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_l_o           :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_lz            :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_lz_o          :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_sample_o             :ref:`vdst<amdgpu_synid_gfx9_vdst_473a69>`,    :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,     :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`,   :ref:`ssamp<amdgpu_synid_gfx9_ssamp>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_store                         :ref:`vdata<amdgpu_synid_gfx9_vdata_15d255>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_store_mip                     :ref:`vdata<amdgpu_synid_gfx9_vdata_15d255>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+    image_store_mip_pck                 :ref:`vdata<amdgpu_synid_gfx9_vdata_c08393>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+    image_store_pck                     :ref:`vdata<amdgpu_synid_gfx9_vdata_c08393>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5d0b42>`,   :ref:`srsrc<amdgpu_synid_gfx9_srsrc_79ffcd>`     :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
 
 MTBUF
------------------------
+-----
 
 .. parsed-literal::
 
     **INSTRUCTION**                     **DST**   **SRC0**   **SRC1**   **SRC2**    **SRC3**      **MODIFIERS**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    tbuffer_load_format_d16_x       :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx9_soffset>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_load_format_d16_xy      :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx9_soffset>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_load_format_d16_xyz     :ref:`vdst<amdgpu_synid_gfx9_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx9_soffset>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_load_format_d16_xyzw    :ref:`vdst<amdgpu_synid_gfx9_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx9_soffset>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_load_format_x           :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx9_soffset>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_load_format_xy          :ref:`vdst<amdgpu_synid_gfx9_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx9_soffset>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_load_format_xyz         :ref:`vdst<amdgpu_synid_gfx9_vdst_11>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx9_soffset>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_load_format_xyzw        :ref:`vdst<amdgpu_synid_gfx9_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx9_soffset>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_store_format_d16_x            :ref:`vdata<amdgpu_synid_gfx9_vdata>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_store_format_d16_xy           :ref:`vdata<amdgpu_synid_gfx9_vdata>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_store_format_d16_xyz          :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_store_format_d16_xyzw         :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_store_format_x                :ref:`vdata<amdgpu_synid_gfx9_vdata>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_store_format_xy               :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_store_format_xyz              :ref:`vdata<amdgpu_synid_gfx9_vdata_3>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    tbuffer_store_format_xyzw             :ref:`vdata<amdgpu_synid_gfx9_vdata_2>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_load_format_d16_x       :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_load_format_d16_xy      :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_load_format_d16_xyz     :ref:`vdst<amdgpu_synid_gfx9_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_load_format_d16_xyzw    :ref:`vdst<amdgpu_synid_gfx9_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_load_format_x           :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_load_format_xy          :ref:`vdst<amdgpu_synid_gfx9_vdst_d71f1c>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_load_format_xyz         :ref:`vdst<amdgpu_synid_gfx9_vdst_81a6ed>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_load_format_xyzw        :ref:`vdst<amdgpu_synid_gfx9_vdst_dd8a32>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`           :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_store_format_d16_x            :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_store_format_d16_xy           :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_store_format_d16_xyz          :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_store_format_d16_xyzw         :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_store_format_x                :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_store_format_xy               :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_store_format_xyz              :ref:`vdata<amdgpu_synid_gfx9_vdata_56f215>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    tbuffer_store_format_xyzw             :ref:`vdata<amdgpu_synid_gfx9_vdata_e016a1>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`   :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
 
 MUBUF
------------------------
+-----
 
 .. parsed-literal::
 
-    **INSTRUCTION**                   **DST**   **SRC0**             **SRC1**    **SRC2**    **SRC3**     **MODIFIERS**
-    \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    buffer_atomic_add                   :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_add_x2                :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_and                   :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_and_x2                :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_cmpswap               :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_cmpswap_x2            :ref:`vdata<amdgpu_synid_gfx9_vdata_10>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_dec                   :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_dec_x2                :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_inc                   :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_inc_x2                :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_or                    :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_or_x2                 :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_smax                  :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_smax_x2               :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_smin                  :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_smin_x2               :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_sub                   :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_sub_x2                :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_swap                  :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_swap_x2               :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_umax                  :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_umax_x2               :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_umin                  :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_umin_x2               :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_xor                   :ref:`vdata<amdgpu_synid_gfx9_vdata_8>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_atomic_xor_x2                :ref:`vdata<amdgpu_synid_gfx9_vdata_9>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_dword             :ref:`vdst<amdgpu_synid_gfx9_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
-    buffer_load_dwordx2           :ref:`vdst<amdgpu_synid_gfx9_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_dwordx3           :ref:`vdst<amdgpu_synid_gfx9_vdst_11>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_dwordx4           :ref:`vdst<amdgpu_synid_gfx9_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_format_d16_hi_x   :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_format_d16_x      :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_format_d16_xy     :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_format_d16_xyz    :ref:`vdst<amdgpu_synid_gfx9_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_format_d16_xyzw   :ref:`vdst<amdgpu_synid_gfx9_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_format_x          :ref:`vdst<amdgpu_synid_gfx9_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
-    buffer_load_format_xy         :ref:`vdst<amdgpu_synid_gfx9_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_format_xyz        :ref:`vdst<amdgpu_synid_gfx9_vdst_11>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_format_xyzw       :ref:`vdst<amdgpu_synid_gfx9_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_sbyte             :ref:`vdst<amdgpu_synid_gfx9_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
-    buffer_load_sbyte_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_sbyte_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_short_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_short_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_sshort            :ref:`vdst<amdgpu_synid_gfx9_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
-    buffer_load_ubyte             :ref:`vdst<amdgpu_synid_gfx9_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
-    buffer_load_ubyte_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_ubyte_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_load_ushort            :ref:`vdst<amdgpu_synid_gfx9_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
-    buffer_store_byte                   :ref:`vdata<amdgpu_synid_gfx9_vdata>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_byte_d16_hi            :ref:`vdata<amdgpu_synid_gfx9_vdata>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_dword                  :ref:`vdata<amdgpu_synid_gfx9_vdata>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_dwordx2                :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_dwordx3                :ref:`vdata<amdgpu_synid_gfx9_vdata_3>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_dwordx4                :ref:`vdata<amdgpu_synid_gfx9_vdata_2>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_format_d16_hi_x        :ref:`vdata<amdgpu_synid_gfx9_vdata>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_format_d16_x           :ref:`vdata<amdgpu_synid_gfx9_vdata>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_format_d16_xy          :ref:`vdata<amdgpu_synid_gfx9_vdata>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_format_d16_xyz         :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_format_d16_xyzw        :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_format_x               :ref:`vdata<amdgpu_synid_gfx9_vdata>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_format_xy              :ref:`vdata<amdgpu_synid_gfx9_vdata_1>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_format_xyz             :ref:`vdata<amdgpu_synid_gfx9_vdata_3>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_format_xyzw            :ref:`vdata<amdgpu_synid_gfx9_vdata_2>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_lds_dword              :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset>`                  :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`lds<amdgpu_synid_lds>`
-    buffer_store_short                  :ref:`vdata<amdgpu_synid_gfx9_vdata>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
-    buffer_store_short_d16_hi           :ref:`vdata<amdgpu_synid_gfx9_vdata>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_5>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_1>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    **INSTRUCTION**                   **DST**       **SRC0**             **SRC1**    **SRC2**    **SRC3**     **MODIFIERS**
+    \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+    buffer_atomic_add                       :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_add_x2                    :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_and                       :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_and_x2                    :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_cmpswap                   :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_cmpswap_x2                :ref:`vdata<amdgpu_synid_gfx9_vdata_890652>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_dec                       :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_dec_x2                    :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_inc                       :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_inc_x2                    :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_or                        :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_or_x2                     :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_smax                      :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_smax_x2                   :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_smin                      :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_smin_x2                   :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_sub                       :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_sub_x2                    :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_swap                      :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_swap_x2                   :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_umax                      :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_umax_x2                   :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_umin                      :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_umin_x2                   :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_xor                       :ref:`vdata<amdgpu_synid_gfx9_vdata_0aba12>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_atomic_xor_x2                    :ref:`vdata<amdgpu_synid_gfx9_vdata_16d321>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_dword             :ref:`vdst<amdgpu_synid_gfx9_vdst_322561>`::ref:`opt<amdgpu_synid_gfx9_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+    buffer_load_dwordx2           :ref:`vdst<amdgpu_synid_gfx9_vdst_d71f1c>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_dwordx3           :ref:`vdst<amdgpu_synid_gfx9_vdst_81a6ed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_dwordx4           :ref:`vdst<amdgpu_synid_gfx9_vdst_dd8a32>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_format_d16_hi_x   :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_format_d16_x      :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_format_d16_xy     :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_format_d16_xyz    :ref:`vdst<amdgpu_synid_gfx9_vdst_d71f1c>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_format_d16_xyzw   :ref:`vdst<amdgpu_synid_gfx9_vdst_d71f1c>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_format_x          :ref:`vdst<amdgpu_synid_gfx9_vdst_322561>`::ref:`opt<amdgpu_synid_gfx9_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+    buffer_load_format_xy         :ref:`vdst<amdgpu_synid_gfx9_vdst_d71f1c>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_format_xyz        :ref:`vdst<amdgpu_synid_gfx9_vdst_81a6ed>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_format_xyzw       :ref:`vdst<amdgpu_synid_gfx9_vdst_dd8a32>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_sbyte             :ref:`vdst<amdgpu_synid_gfx9_vdst_322561>`::ref:`opt<amdgpu_synid_gfx9_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+    buffer_load_sbyte_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_sbyte_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_short_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_short_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_sshort            :ref:`vdst<amdgpu_synid_gfx9_vdst_322561>`::ref:`opt<amdgpu_synid_gfx9_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+    buffer_load_ubyte             :ref:`vdst<amdgpu_synid_gfx9_vdst_322561>`::ref:`opt<amdgpu_synid_gfx9_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+    buffer_load_ubyte_d16         :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_ubyte_d16_hi      :ref:`vdst<amdgpu_synid_gfx9_vdst_709347>`,     :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_load_ushort            :ref:`vdst<amdgpu_synid_gfx9_vdst_322561>`::ref:`opt<amdgpu_synid_gfx9_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,           :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`          :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+    buffer_store_byte                       :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_byte_d16_hi                :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_dword                      :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_dwordx2                    :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_dwordx3                    :ref:`vdata<amdgpu_synid_gfx9_vdata_56f215>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_dwordx4                    :ref:`vdata<amdgpu_synid_gfx9_vdata_e016a1>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_format_d16_hi_x            :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_format_d16_x               :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_format_d16_xy              :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_format_d16_xyz             :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_format_d16_xyzw            :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_format_x                   :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_format_xy                  :ref:`vdata<amdgpu_synid_gfx9_vdata_fd235e>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_format_xyz                 :ref:`vdata<amdgpu_synid_gfx9_vdata_56f215>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_format_xyzw                :ref:`vdata<amdgpu_synid_gfx9_vdata_e016a1>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_lds_dword                  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`                  :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`lds<amdgpu_synid_lds>`
+    buffer_store_short                      :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+    buffer_store_short_d16_hi               :ref:`vdata<amdgpu_synid_gfx9_vdata_6802ce>`,           :ref:`vaddr<amdgpu_synid_gfx9_vaddr_b73dc0>`,  :ref:`srsrc<amdgpu_synid_gfx9_srsrc_e73d16>`,  :ref:`soffset<amdgpu_synid_gfx9_soffset_4318ca>`  :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
     buffer_wbinvl1
     buffer_wbinvl1_vol
 
 SMEM
------------------------
+----
 
 .. parsed-literal::
 
     **INSTRUCTION**                    **DST**       **SRC0**             **SRC1**      **SRC2**           **MODIFIERS**
-    \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    s_atc_probe                              :ref:`probe<amdgpu_synid_gfx9_probe>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`
-    s_atc_probe_buffer                       :ref:`probe<amdgpu_synid_gfx9_probe>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`
-    s_atomic_add                             :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_add_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_and                             :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_and_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_cmpswap                         :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_cmpswap_x2                      :ref:`sdata<amdgpu_synid_gfx9_sdata_2>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_dec                             :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_dec_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_inc                             :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_inc_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_or                              :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_or_x2                           :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_smax                            :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_smax_x2                         :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_smin                            :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_smin_x2                         :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_sub                             :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_sub_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_swap                            :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_swap_x2                         :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_umax                            :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_umax_x2                         :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_umin                            :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_umin_x2                         :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_xor                             :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_atomic_xor_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_add                      :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_add_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_and                      :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_and_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_cmpswap                  :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_cmpswap_x2               :ref:`sdata<amdgpu_synid_gfx9_sdata_2>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_dec                      :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_dec_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_inc                      :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_inc_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_or                       :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_or_x2                    :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_smax                     :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_smax_x2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_smin                     :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_smin_x2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_sub                      :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_sub_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_swap                     :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_swap_x2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_umax                     :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_umax_x2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_umin                     :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_umin_x2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_xor                      :ref:`sdata<amdgpu_synid_gfx9_sdata>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_atomic_xor_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_1>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_load_dword            :ref:`sdst<amdgpu_synid_gfx9_sdst>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_load_dwordx16         :ref:`sdst<amdgpu_synid_gfx9_sdst_1>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_load_dwordx2          :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_load_dwordx4          :ref:`sdst<amdgpu_synid_gfx9_sdst_3>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_load_dwordx8          :ref:`sdst<amdgpu_synid_gfx9_sdst_4>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_store_dword                     :ref:`sdata<amdgpu_synid_gfx9_sdata_3>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_store_dwordx2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_4>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_buffer_store_dwordx4                   :ref:`sdata<amdgpu_synid_gfx9_sdata_5>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_1>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_2>`        :ref:`glc<amdgpu_synid_glc>`
-    s_dcache_discard                         :ref:`sbase<amdgpu_synid_gfx9_sbase>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`
-    s_dcache_discard_x2                      :ref:`sbase<amdgpu_synid_gfx9_sbase>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`
+    \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+    s_atc_probe                              :ref:`probe<amdgpu_synid_gfx9_probe>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>`
+    s_atc_probe_buffer                       :ref:`probe<amdgpu_synid_gfx9_probe>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>`
+    s_atomic_add                             :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_add_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_and                             :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_and_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_cmpswap                         :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_cmpswap_x2                      :ref:`sdata<amdgpu_synid_gfx9_sdata_c6aec1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_dec                             :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_dec_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_inc                             :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_inc_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_or                              :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_or_x2                           :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_smax                            :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_smax_x2                         :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_smin                            :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_smin_x2                         :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_sub                             :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_sub_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_swap                            :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_swap_x2                         :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_umax                            :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_umax_x2                         :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_umin                            :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_umin_x2                         :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_xor                             :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_atomic_xor_x2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_add                      :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_add_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_and                      :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_and_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_cmpswap                  :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b32x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_cmpswap_x2               :ref:`sdata<amdgpu_synid_gfx9_sdata_c6aec1>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`b64x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_dec                      :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_dec_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_inc                      :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_inc_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_or                       :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_or_x2                    :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_smax                     :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_smax_x2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_smin                     :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_smin_x2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_sub                      :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_sub_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_swap                     :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_swap_x2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_umax                     :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_umax_x2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_umin                     :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_umin_x2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`,   :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_xor                      :ref:`sdata<amdgpu_synid_gfx9_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_atomic_xor_x2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx9_dst>`,       :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_load_dword            :ref:`sdst<amdgpu_synid_gfx9_sdst_94342d>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`                  :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_load_dwordx16         :ref:`sdst<amdgpu_synid_gfx9_sdst_3bc700>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`                  :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_load_dwordx2          :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`                  :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_load_dwordx4          :ref:`sdst<amdgpu_synid_gfx9_sdst_0804b1>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`                  :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_load_dwordx8          :ref:`sdst<amdgpu_synid_gfx9_sdst_362c37>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`                  :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_store_dword                     :ref:`sdata<amdgpu_synid_gfx9_sdata_595c25>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_store_dwordx2                   :ref:`sdata<amdgpu_synid_gfx9_sdata_e9f591>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_buffer_store_dwordx4                   :ref:`sdata<amdgpu_synid_gfx9_sdata_7cbd60>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_010ce0>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_ba92ce>`        :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+    s_dcache_discard                         :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`                  :ref:`offset21s<amdgpu_synid_smem_offset21s>`
+    s_dcache_discard_x2                      :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`                  :ref:`offset21s<amdgpu_synid_smem_offset21s>`
     s_dcache_inv
     s_dcache_inv_vol
     s_dcache_wb
     s_dcache_wb_vol
-    s_load_dword                   :ref:`sdst<amdgpu_synid_gfx9_sdst>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_load_dwordx16                :ref:`sdst<amdgpu_synid_gfx9_sdst_1>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_load_dwordx2                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_load_dwordx4                 :ref:`sdst<amdgpu_synid_gfx9_sdst_3>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_load_dwordx8                 :ref:`sdst<amdgpu_synid_gfx9_sdst_4>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_memrealtime                  :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`::ref:`b64<amdgpu_synid_gfx9_type_deviation>`
-    s_memtime                      :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`::ref:`b64<amdgpu_synid_gfx9_type_deviation>`
-    s_scratch_load_dword           :ref:`sdst<amdgpu_synid_gfx9_sdst>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_2>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_scratch_load_dwordx2         :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_2>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_scratch_load_dwordx4         :ref:`sdst<amdgpu_synid_gfx9_sdst_3>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_2>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`                  :ref:`glc<amdgpu_synid_glc>`
-    s_scratch_store_dword                    :ref:`sdata<amdgpu_synid_gfx9_sdata_3>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_2>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_scratch_store_dwordx2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_4>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_2>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_scratch_store_dwordx4                  :ref:`sdata<amdgpu_synid_gfx9_sdata_5>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_2>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_store_dword                            :ref:`sdata<amdgpu_synid_gfx9_sdata_3>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_store_dwordx2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_4>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
-    s_store_dwordx4                          :ref:`sdata<amdgpu_synid_gfx9_sdata_5>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_1>`        :ref:`glc<amdgpu_synid_glc>`
+    s_load_dword                   :ref:`sdst<amdgpu_synid_gfx9_sdst_94342d>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`                  :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_load_dwordx16                :ref:`sdst<amdgpu_synid_gfx9_sdst_3bc700>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`                  :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_load_dwordx2                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`                  :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_load_dwordx4                 :ref:`sdst<amdgpu_synid_gfx9_sdst_0804b1>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`                  :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_load_dwordx8                 :ref:`sdst<amdgpu_synid_gfx9_sdst_362c37>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`                  :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_memrealtime                  :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`::ref:`b64<amdgpu_synid_gfx9_type_deviation>`
+    s_memtime                      :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`::ref:`b64<amdgpu_synid_gfx9_type_deviation>`
+    s_scratch_load_dword           :ref:`sdst<amdgpu_synid_gfx9_sdst_94342d>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_0cd545>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`                  :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_scratch_load_dwordx2         :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_0cd545>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`                  :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_scratch_load_dwordx4         :ref:`sdst<amdgpu_synid_gfx9_sdst_0804b1>`,     :ref:`sbase<amdgpu_synid_gfx9_sbase_0cd545>`,           :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`                  :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_scratch_store_dword                    :ref:`sdata<amdgpu_synid_gfx9_sdata_595c25>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_0cd545>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_scratch_store_dwordx2                  :ref:`sdata<amdgpu_synid_gfx9_sdata_e9f591>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_0cd545>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_scratch_store_dwordx4                  :ref:`sdata<amdgpu_synid_gfx9_sdata_7cbd60>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_0cd545>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_store_dword                            :ref:`sdata<amdgpu_synid_gfx9_sdata_595c25>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_store_dwordx2                          :ref:`sdata<amdgpu_synid_gfx9_sdata_e9f591>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+    s_store_dwordx4                          :ref:`sdata<amdgpu_synid_gfx9_sdata_7cbd60>`,           :ref:`sbase<amdgpu_synid_gfx9_sbase_044055>`,    :ref:`soffset<amdgpu_synid_gfx9_soffset_8a17c8>`        :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
 
 SOP1
------------------------
+----
 
 .. parsed-literal::
 
     **INSTRUCTION**                    **DST**       **SRC**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    s_abs_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_and_saveexec_b64             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_andn1_saveexec_b64           :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_andn1_wrexec_b64             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_andn2_saveexec_b64           :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_andn2_wrexec_b64             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_bcnt0_i32_b32                :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_bcnt0_i32_b64                :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_bcnt1_i32_b32                :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_bcnt1_i32_b64                :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_bitreplicate_b64_b32         :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_bitset0_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_bitset0_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    s_bitset1_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_bitset1_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    s_brev_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_brev_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_cbranch_join                           :ref:`ssrc<amdgpu_synid_gfx9_ssrc_2>`
-    s_cmov_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_cmov_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_ff0_i32_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_ff0_i32_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_ff1_i32_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_ff1_i32_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_flbit_i32                    :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_flbit_i32_b32                :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_flbit_i32_b64                :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_flbit_i32_i64                :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_getpc_b64                    :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`
-    s_mov_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_mov_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_movreld_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_movreld_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_movrels_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_2>`
-    s_movrels_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_3>`
-    s_nand_saveexec_b64            :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_nor_saveexec_b64             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_not_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_not_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_or_saveexec_b64              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_orn1_saveexec_b64            :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_orn2_saveexec_b64            :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_quadmask_b32                 :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_quadmask_b64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_rfe_b64                                :ref:`ssrc<amdgpu_synid_gfx9_ssrc_3>`
-    s_set_gpr_idx_idx                        :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_setpc_b64                              :ref:`ssrc<amdgpu_synid_gfx9_ssrc_3>`
-    s_sext_i32_i16                 :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_sext_i32_i8                  :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_swappc_b64                   :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_3>`
-    s_wqm_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`
-    s_wqm_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_xnor_saveexec_b64            :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
-    s_xor_saveexec_b64             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_1>`
+    s_abs_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_and_saveexec_b64             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_andn1_saveexec_b64           :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_andn1_wrexec_b64             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_andn2_saveexec_b64           :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_andn2_wrexec_b64             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_bcnt0_i32_b32                :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_bcnt0_i32_b64                :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_bcnt1_i32_b32                :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_bcnt1_i32_b64                :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_bitreplicate_b64_b32         :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_bitset0_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_bitset0_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    s_bitset1_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_bitset1_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    s_brev_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_brev_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_cbranch_join                           :ref:`ssrc<amdgpu_synid_gfx9_ssrc_595c25>`
+    s_cmov_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmov_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_ff0_i32_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_ff0_i32_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_ff1_i32_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_ff1_i32_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_flbit_i32                    :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_flbit_i32_b32                :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_flbit_i32_b64                :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_flbit_i32_i64                :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_getpc_b64                    :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`
+    s_mov_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_mov_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_movreld_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_94342d>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_movreld_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_movrels_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_595c25>`
+    s_movrels_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_e9f591>`
+    s_nand_saveexec_b64            :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_nor_saveexec_b64             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_not_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_not_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_or_saveexec_b64              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_orn1_saveexec_b64            :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_orn2_saveexec_b64            :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_quadmask_b32                 :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_quadmask_b64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_rfe_b64                                :ref:`ssrc<amdgpu_synid_gfx9_ssrc_e9f591>`
+    s_set_gpr_idx_idx                        :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_setpc_b64                              :ref:`ssrc<amdgpu_synid_gfx9_ssrc_e9f591>`
+    s_sext_i32_i16                 :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_sext_i32_i8                  :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_swappc_b64                   :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_e9f591>`
+    s_wqm_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_wqm_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_xnor_saveexec_b64            :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_xor_saveexec_b64             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`ssrc<amdgpu_synid_gfx9_ssrc_aee59c>`
 
 SOP2
------------------------
+----
 
 .. parsed-literal::
 
     **INSTRUCTION**                    **DST**       **SRC0**       **SRC1**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    s_absdiff_i32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_add_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_add_u32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_addc_u32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_and_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_and_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_1>`
-    s_andn2_b32                    :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_andn2_b64                    :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_1>`
-    s_ashr_i32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    s_ashr_i64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    s_bfe_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    s_bfe_i64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    s_bfe_u32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_bfe_u64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    s_bfm_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_bfm_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    s_cbranch_g_fork                         :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_4>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_4>`
-    s_cselect_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cselect_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_1>`
-    s_lshl1_add_u32                :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_lshl2_add_u32                :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_lshl3_add_u32                :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_lshl4_add_u32                :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_lshl_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    s_lshl_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    s_lshr_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    s_lshr_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    s_max_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_max_u32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_min_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_min_u32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_mul_hi_i32                   :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_mul_hi_u32                   :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_mul_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_nand_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_nand_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_1>`
-    s_nor_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_nor_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_1>`
-    s_or_b32                       :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_or_b64                       :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_1>`
-    s_orn2_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_orn2_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_1>`
-    s_pack_hh_b32_b16              :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    s_pack_lh_b32_b16              :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    s_pack_ll_b32_b16              :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_rfe_restore_b64                        :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    s_sub_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_sub_u32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_subb_u32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_xnor_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_xnor_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_1>`
-    s_xor_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_xor_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_1>`
+    s_absdiff_i32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_add_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_add_u32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_addc_u32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_and_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_and_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_andn2_b32                    :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_andn2_b64                    :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_ashr_i32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    s_ashr_i64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    s_bfe_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    s_bfe_i64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    s_bfe_u32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_bfe_u64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    s_bfm_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_bfm_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    s_cbranch_g_fork                         :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c31902>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c31902>`
+    s_cselect_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cselect_b64                  :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_lshl1_add_u32                :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_lshl2_add_u32                :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_lshl3_add_u32                :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_lshl4_add_u32                :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_lshl_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    s_lshl_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    s_lshr_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    s_lshr_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    s_max_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_max_u32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_min_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_min_u32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_mul_hi_i32                   :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_mul_hi_u32                   :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_mul_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_nand_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_nand_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_nor_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_nor_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_or_b32                       :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_or_b64                       :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_orn2_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_orn2_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_pack_hh_b32_b16              :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    s_pack_lh_b32_b16              :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    s_pack_ll_b32_b16              :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_rfe_restore_b64                        :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    s_sub_i32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_sub_u32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_subb_u32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_xnor_b32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_xnor_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_xor_b32                      :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_xor_b64                      :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,     :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_aee59c>`
 
 SOPC
------------------------
+----
 
 .. parsed-literal::
 
     **INSTRUCTION**                    **SRC0**      **SRC1**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    s_bitcmp0_b32                  :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_bitcmp0_b64                  :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    s_bitcmp1_b32                  :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_bitcmp1_b64                  :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    s_cmp_eq_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cmp_eq_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cmp_eq_u64                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_1>`
-    s_cmp_ge_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cmp_ge_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cmp_gt_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cmp_gt_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cmp_le_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cmp_le_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cmp_lg_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cmp_lg_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cmp_lg_u64                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_1>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_1>`
-    s_cmp_lt_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_cmp_lt_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
-    s_set_gpr_idx_on               :ref:`ssrc<amdgpu_synid_gfx9_ssrc>`,     :ref:`imask<amdgpu_synid_gfx9_imask>`
-    s_setvskip                     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc>`
+    s_bitcmp0_b32                  :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_bitcmp0_b64                  :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    s_bitcmp1_b32                  :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_bitcmp1_b64                  :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    s_cmp_eq_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmp_eq_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmp_eq_u64                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_cmp_ge_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmp_ge_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmp_gt_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmp_gt_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmp_le_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmp_le_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmp_lg_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmp_lg_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmp_lg_u64                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_aee59c>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_aee59c>`
+    s_cmp_lt_i32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_cmp_lt_u32                   :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
+    s_set_gpr_idx_on               :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c5d631>`,     :ref:`imask<amdgpu_synid_gfx9_imask>`
+    s_setvskip                     :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_c5d631>`,    :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_c5d631>`
 
 SOPK
------------------------
+----
 
 .. parsed-literal::
 
     **INSTRUCTION**                    **DST**       **SRC0**      **SRC1**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    s_addk_i32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16>`
-    s_call_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`label<amdgpu_synid_gfx9_label>`
-    s_cbranch_i_fork                         :ref:`ssrc<amdgpu_synid_gfx9_ssrc_5>`,     :ref:`label<amdgpu_synid_gfx9_label>`
-    s_cmovk_i32                    :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16>`
-    s_cmpk_eq_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16>`
-    s_cmpk_eq_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_1>`
-    s_cmpk_ge_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16>`
-    s_cmpk_ge_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_1>`
-    s_cmpk_gt_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16>`
-    s_cmpk_gt_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_1>`
-    s_cmpk_le_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16>`
-    s_cmpk_le_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_1>`
-    s_cmpk_lg_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16>`
-    s_cmpk_lg_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_1>`
-    s_cmpk_lt_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16>`
-    s_cmpk_lt_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_1>`
-    s_getreg_b32                   :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`hwreg<amdgpu_synid_gfx9_hwreg>`
-    s_movk_i32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16>`
-    s_mulk_i32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_5>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16>`
-    s_setreg_b32                   :ref:`hwreg<amdgpu_synid_gfx9_hwreg>`,    :ref:`ssrc<amdgpu_synid_gfx9_ssrc_6>`
-    s_setreg_imm32_b32             :ref:`hwreg<amdgpu_synid_gfx9_hwreg>`,    :ref:`simm32<amdgpu_synid_gfx9_simm32>`
+    s_addk_i32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_call_b64                     :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`label<amdgpu_synid_gfx9_label>`
+    s_cbranch_i_fork                         :ref:`ssrc<amdgpu_synid_gfx9_ssrc_65f041>`,     :ref:`label<amdgpu_synid_gfx9_label>`
+    s_cmovk_i32                    :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_cmpk_eq_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_cmpk_eq_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_a04fb3>`
+    s_cmpk_ge_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_cmpk_ge_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_a04fb3>`
+    s_cmpk_gt_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_cmpk_gt_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_a04fb3>`
+    s_cmpk_le_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_cmpk_le_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_a04fb3>`
+    s_cmpk_lg_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_cmpk_lg_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_a04fb3>`
+    s_cmpk_lt_i32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_cmpk_lt_u32                            :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_a04fb3>`
+    s_getreg_b32                   :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`hwreg<amdgpu_synid_gfx9_hwreg>`
+    s_movk_i32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_mulk_i32                     :ref:`sdst<amdgpu_synid_gfx9_sdst_06b266>`,     :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_setreg_b32                   :ref:`hwreg<amdgpu_synid_gfx9_hwreg>`,    :ref:`ssrc<amdgpu_synid_gfx9_ssrc_c8a322>`
+    s_setreg_imm32_b32             :ref:`hwreg<amdgpu_synid_gfx9_hwreg>`,    :ref:`simm32<amdgpu_synid_gfx9_simm32_a3e80c>`
 
 SOPP
------------------------
+----
 
 .. parsed-literal::
 
@@ -817,1209 +817,1209 @@ SOPP
     s_cbranch_scc1                 :ref:`label<amdgpu_synid_gfx9_label>`
     s_cbranch_vccnz                :ref:`label<amdgpu_synid_gfx9_label>`
     s_cbranch_vccz                 :ref:`label<amdgpu_synid_gfx9_label>`
-    s_decperflevel                 :ref:`imm16<amdgpu_synid_gfx9_imm16_2>`
+    s_decperflevel                 :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
     s_endpgm
     s_endpgm_ordered_ps_done
     s_endpgm_saved
     s_icache_inv
-    s_incperflevel                 :ref:`imm16<amdgpu_synid_gfx9_imm16_2>`
-    s_nop                          :ref:`imm16<amdgpu_synid_gfx9_imm16_2>`
+    s_incperflevel                 :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_nop                          :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
     s_sendmsg                      :ref:`msg<amdgpu_synid_gfx9_msg>`
     s_sendmsghalt                  :ref:`msg<amdgpu_synid_gfx9_msg>`
     s_set_gpr_idx_mode             :ref:`imask<amdgpu_synid_gfx9_imask>`
     s_set_gpr_idx_off
-    s_sethalt                      :ref:`imm16<amdgpu_synid_gfx9_imm16_2>`
-    s_setkill                      :ref:`imm16<amdgpu_synid_gfx9_imm16_2>`
-    s_setprio                      :ref:`imm16<amdgpu_synid_gfx9_imm16_2>`
-    s_sleep                        :ref:`imm16<amdgpu_synid_gfx9_imm16_2>`
-    s_trap                         :ref:`imm16<amdgpu_synid_gfx9_imm16_2>`
+    s_sethalt                      :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_setkill                      :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_setprio                      :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_sleep                        :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
+    s_trap                         :ref:`imm16<amdgpu_synid_gfx9_imm16_73139a>`
     s_ttracedata
     s_waitcnt                      :ref:`waitcnt<amdgpu_synid_gfx9_waitcnt>`
     s_wakeup
 
 VINTRP
------------------------
+------
 
 .. parsed-literal::
 
     **INSTRUCTION**                    **DST**       **SRC0**       **SRC1**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    v_interp_mov_f32               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,     :ref:`param<amdgpu_synid_gfx9_param>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`, :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_interp_p1_f32                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,     :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_interp_p2_f32                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,     :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_interp_mov_f32               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,     :ref:`param<amdgpu_synid_gfx9_param>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`, :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_interp_p1_f32                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,     :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_interp_p2_f32                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,     :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
 
 VOP1
------------------------
+----
 
 .. parsed-literal::
 
     **INSTRUCTION**                         **DST**        **SRC**            **MODIFIERS**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    v_bfrev_b32                         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_bfrev_b32_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_bfrev_b32_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_ceil_f16                          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_ceil_f16_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_ceil_f16_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_ceil_f32                          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_ceil_f32_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_ceil_f32_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_ceil_f64                          :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
+    v_bfrev_b32                         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_bfrev_b32_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_bfrev_b32_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_ceil_f16                          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_ceil_f16_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_ceil_f16_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_ceil_f32                          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_ceil_f32_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_ceil_f32_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_ceil_f64                          :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
     v_clrexcp
-    v_cos_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cos_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cos_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cos_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cos_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cos_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_f16_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_f16_f32_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_f16_f32_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_f16_i16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_3>`
-    v_cvt_f16_i16_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_f16_i16_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_f16_u16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_3>`
-    v_cvt_f16_u16_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_f16_u16_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_f32_f16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_f32_f16_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_f32_f16_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_f32_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
-    v_cvt_f32_i32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_f32_i32_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_f32_i32_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_f32_u32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_f32_u32_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_f32_u32_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_f32_ubyte0                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_f32_ubyte0_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_f32_ubyte0_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_f32_ubyte1                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_f32_ubyte1_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_f32_ubyte1_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_f32_ubyte2                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_f32_ubyte2_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_f32_ubyte2_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_f32_ubyte3                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_f32_ubyte3_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_f32_ubyte3_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_f64_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_f64_i32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_f64_u32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_flr_i32_f32                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_flr_i32_f32_dpp               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_flr_i32_f32_sdwa              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_i16_f16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_i16_f16_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_i16_f16_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_i32_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_i32_f32_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_i32_f32_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_i32_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
-    v_cvt_norm_i16_f16                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_norm_i16_f16_dpp              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_norm_i16_f16_sdwa             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_norm_u16_f16                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_norm_u16_f16_dpp              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_norm_u16_f16_sdwa             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_off_f32_i4                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_off_f32_i4_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_off_f32_i4_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_rpi_i32_f32                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_rpi_i32_f32_dpp               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_rpi_i32_f32_sdwa              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_u16_f16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_u16_f16_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_u16_f16_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_u32_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_cvt_u32_f32_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cvt_u32_f32_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_cvt_u32_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
-    v_exp_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_exp_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_exp_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_exp_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_exp_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_exp_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_exp_legacy_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_exp_legacy_f32_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_exp_legacy_f32_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_ffbh_i32                          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_ffbh_i32_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_ffbh_i32_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_ffbh_u32                          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_ffbh_u32_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_ffbh_u32_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_ffbl_b32                          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_ffbl_b32_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_ffbl_b32_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_floor_f16                         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_floor_f16_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_floor_f16_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_floor_f32                         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_floor_f32_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_floor_f32_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_floor_f64                         :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
-    v_fract_f16                         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_fract_f16_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_fract_f16_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_fract_f32                         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_fract_f32_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_fract_f32_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_fract_f64                         :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
-    v_frexp_exp_i16_f16                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_frexp_exp_i16_f16_dpp             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_frexp_exp_i16_f16_sdwa            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_frexp_exp_i32_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_frexp_exp_i32_f32_dpp             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_frexp_exp_i32_f32_sdwa            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_frexp_exp_i32_f64                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
-    v_frexp_mant_f16                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_frexp_mant_f16_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_frexp_mant_f16_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_frexp_mant_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_frexp_mant_f32_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_frexp_mant_f32_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_frexp_mant_f64                    :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
-    v_log_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_log_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_log_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_log_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_log_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_log_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_log_legacy_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_log_legacy_f32_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_log_legacy_f32_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_mov_b32                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_mov_b32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_mov_b32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cos_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cos_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cos_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cos_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cos_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cos_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_f16_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_f16_f32_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_f16_f32_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_f16_i16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_089570>`
+    v_cvt_f16_i16_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_f16_i16_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_f16_u16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_089570>`
+    v_cvt_f16_u16_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_f16_u16_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_f32_f16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_f32_f16_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_f32_f16_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_f32_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
+    v_cvt_f32_i32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_f32_i32_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_f32_i32_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_f32_u32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_f32_u32_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_f32_u32_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_f32_ubyte0                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_f32_ubyte0_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_f32_ubyte0_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_f32_ubyte1                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_f32_ubyte1_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_f32_ubyte1_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_f32_ubyte2                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_f32_ubyte2_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_f32_ubyte2_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_f32_ubyte3                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_f32_ubyte3_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_f32_ubyte3_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_f64_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_f64_i32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_f64_u32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_flr_i32_f32                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_flr_i32_f32_dpp               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_flr_i32_f32_sdwa              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_i16_f16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_i16_f16_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_i16_f16_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_i32_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_i32_f32_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_i32_f32_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_i32_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
+    v_cvt_norm_i16_f16                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_norm_i16_f16_dpp              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_norm_i16_f16_sdwa             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_norm_u16_f16                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_norm_u16_f16_dpp              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_norm_u16_f16_sdwa             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_off_f32_i4                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_off_f32_i4_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_off_f32_i4_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_rpi_i32_f32                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_rpi_i32_f32_dpp               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_rpi_i32_f32_sdwa              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_u16_f16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_u16_f16_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_u16_f16_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_u32_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_cvt_u32_f32_dpp                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cvt_u32_f32_sdwa                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_cvt_u32_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
+    v_exp_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_exp_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_exp_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_exp_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_exp_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_exp_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_exp_legacy_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_exp_legacy_f32_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_exp_legacy_f32_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_ffbh_i32                          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_ffbh_i32_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_ffbh_i32_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_ffbh_u32                          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_ffbh_u32_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_ffbh_u32_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_ffbl_b32                          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_ffbl_b32_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_ffbl_b32_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_floor_f16                         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_floor_f16_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_floor_f16_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_floor_f32                         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_floor_f32_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_floor_f32_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_floor_f64                         :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
+    v_fract_f16                         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_fract_f16_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_fract_f16_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_fract_f32                         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_fract_f32_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_fract_f32_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_fract_f64                         :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
+    v_frexp_exp_i16_f16                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_frexp_exp_i16_f16_dpp             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_frexp_exp_i16_f16_sdwa            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_frexp_exp_i32_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_frexp_exp_i32_f32_dpp             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_frexp_exp_i32_f32_sdwa            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_frexp_exp_i32_f64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
+    v_frexp_mant_f16                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_frexp_mant_f16_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_frexp_mant_f16_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_frexp_mant_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_frexp_mant_f32_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_frexp_mant_f32_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_frexp_mant_f64                    :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
+    v_log_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_log_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_log_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_log_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_log_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_log_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_log_legacy_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_log_legacy_f32_dpp                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_log_legacy_f32_sdwa               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_mov_b32                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_mov_b32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_mov_b32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
     v_nop
-    v_not_b32                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_not_b32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_not_b32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_rcp_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_rcp_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_rcp_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_rcp_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_rcp_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_rcp_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_rcp_f64                           :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
-    v_rcp_iflag_f32                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_rcp_iflag_f32_dpp                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_rcp_iflag_f32_sdwa                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_readfirstlane_b32                 :ref:`sdst<amdgpu_synid_gfx9_sdst_7>`,      :ref:`src<amdgpu_synid_gfx9_src_5>`
-    v_rndne_f16                         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_rndne_f16_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_rndne_f16_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_rndne_f32                         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_rndne_f32_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_rndne_f32_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_rndne_f64                         :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
-    v_rsq_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_rsq_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_rsq_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_rsq_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_rsq_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_rsq_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_rsq_f64                           :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
-    v_sat_pk_u8_i16                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`, :ref:`src<amdgpu_synid_gfx9_src>`
-    v_sat_pk_u8_i16_dpp                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_sat_pk_u8_i16_sdwa                :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`, :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_screen_partition_4se_b32          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_screen_partition_4se_b32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_screen_partition_4se_b32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_sin_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_sin_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_sin_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_sin_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_sin_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_sin_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_sqrt_f16                          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_sqrt_f16_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_sqrt_f16_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_sqrt_f32                          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_sqrt_f32_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_sqrt_f32_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_sqrt_f64                          :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
-    v_swap_b32                          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`
-    v_trunc_f16                         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_trunc_f16_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_trunc_f16_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_trunc_f32                         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src>`
-    v_trunc_f32_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_trunc_f32_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
-    v_trunc_f64                         :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,      :ref:`src<amdgpu_synid_gfx9_src_2>`
+    v_not_b32                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_not_b32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_not_b32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_rcp_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_rcp_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_rcp_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_rcp_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_rcp_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_rcp_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_rcp_f64                           :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
+    v_rcp_iflag_f32                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_rcp_iflag_f32_dpp                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_rcp_iflag_f32_sdwa                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_readfirstlane_b32                 :ref:`sdst<amdgpu_synid_gfx9_sdst_59204c>`,      :ref:`src<amdgpu_synid_gfx9_src_516946>`
+    v_rndne_f16                         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_rndne_f16_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_rndne_f16_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_rndne_f32                         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_rndne_f32_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_rndne_f32_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_rndne_f64                         :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
+    v_rsq_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_rsq_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_rsq_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_rsq_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_rsq_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_rsq_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_rsq_f64                           :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
+    v_sat_pk_u8_i16                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`, :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_sat_pk_u8_i16_dpp                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_sat_pk_u8_i16_sdwa                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`, :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_screen_partition_4se_b32          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_screen_partition_4se_b32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`           :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_screen_partition_4se_b32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_sin_f16                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_sin_f16_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_sin_f16_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_sin_f32                           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_sin_f32_dpp                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_sin_f32_sdwa                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_sqrt_f16                          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_sqrt_f16_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_sqrt_f16_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_sqrt_f32                          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_sqrt_f32_dpp                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_sqrt_f32_sdwa                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_sqrt_f64                          :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
+    v_swap_b32                          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_trunc_f16                         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_trunc_f16_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_trunc_f16_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_trunc_f32                         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_73ab34>`
+    v_trunc_f32_dpp                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_trunc_f32_sdwa                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+    v_trunc_f64                         :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,      :ref:`src<amdgpu_synid_gfx9_src_56ed80>`
 
 VOP2
------------------------
+----
 
 .. parsed-literal::
 
     **INSTRUCTION**            **DST0**  **DST1** **SRC0**        **SRC1**       **SRC2**    **MODIFIERS**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    v_add_co_u32           :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_add_co_u32_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_add_co_u32_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_add_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_add_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_add_f16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_add_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_add_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_add_f32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_add_u16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_add_u16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_add_u16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_add_u32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_add_u32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_add_u32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_addc_co_u32          :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`
-    v_addc_co_u32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_addc_co_u32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,    :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_and_b32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_and_b32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_and_b32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_ashrrev_i16          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_6>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_ashrrev_i16_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_ashrrev_i16_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_ashrrev_i32          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_7>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_ashrrev_i32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_ashrrev_i32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cndmask_b32          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`
-    v_cndmask_b32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_cndmask_b32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,    :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_ldexp_f16            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`i16<amdgpu_synid_gfx9_type_deviation>`
-    v_ldexp_f16_dpp        :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`i16<amdgpu_synid_gfx9_type_deviation>`          :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_ldexp_f16_sdwa       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`::ref:`i16<amdgpu_synid_gfx9_type_deviation>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_lshlrev_b16          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_6>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_lshlrev_b16_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_lshlrev_b16_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_lshlrev_b32          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_7>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_lshlrev_b32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_lshlrev_b32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_lshrrev_b16          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_6>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_lshrrev_b16_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_lshrrev_b16_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_lshrrev_b32          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_7>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_lshrrev_b32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_lshrrev_b32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_mac_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_mac_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_mac_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_mac_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_madak_f16            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_8>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`,     :ref:`simm32<amdgpu_synid_gfx9_simm32_1>`
-    v_madak_f32            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_8>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`,     :ref:`simm32<amdgpu_synid_gfx9_simm32_2>`
-    v_madmk_f16            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_8>`,       :ref:`simm32<amdgpu_synid_gfx9_simm32_1>`,    :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_1>`
-    v_madmk_f32            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_8>`,       :ref:`simm32<amdgpu_synid_gfx9_simm32_2>`,    :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_1>`
-    v_max_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_max_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_max_f16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_max_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_max_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_max_f32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_max_i16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_max_i16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_max_i16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_max_i32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_max_i32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_max_i32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_max_u16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_max_u16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_max_u16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_max_u32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_max_u32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_max_u32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_min_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_min_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_min_f16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_min_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_min_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_min_f32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_min_i16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_min_i16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_min_i16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_min_i32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_min_i32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_min_i32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_min_u16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_min_u16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_min_u16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_min_u32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_min_u32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_min_u32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_mul_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_mul_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_mul_f16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_mul_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_mul_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_mul_f32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_mul_hi_i32_i24       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_mul_hi_i32_i24_dpp   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_mul_hi_i32_i24_sdwa  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_mul_hi_u32_u24       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_mul_hi_u32_u24_dpp   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_mul_hi_u32_u24_sdwa  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_mul_i32_i24          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_mul_i32_i24_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_mul_i32_i24_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_mul_legacy_f32       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_mul_legacy_f32_dpp   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_mul_legacy_f32_sdwa  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_mul_lo_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_mul_lo_u16_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_mul_lo_u16_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_mul_u32_u24          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_mul_u32_u24_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_mul_u32_u24_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_or_b32               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_or_b32_dpp           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_or_b32_sdwa          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_sub_co_u32           :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_sub_co_u32_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_sub_co_u32_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_sub_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_sub_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_sub_f16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_sub_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_sub_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_sub_f32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_sub_u16              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_sub_u16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_sub_u16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_sub_u32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_sub_u32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_sub_u32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_subb_co_u32          :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`
-    v_subb_co_u32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_subb_co_u32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,    :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_subbrev_co_u32       :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_7>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`
-    v_subbrev_co_u32_dpp   :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_subbrev_co_u32_sdwa  :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,    :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_subrev_co_u32        :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_7>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_subrev_co_u32_dpp    :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_subrev_co_u32_sdwa   :ref:`vdst<amdgpu_synid_gfx9_vdst>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_subrev_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_7>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_subrev_f16_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_subrev_f16_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_subrev_f32           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_7>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_subrev_f32_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_subrev_f32_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_subrev_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_6>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_subrev_u16_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_subrev_u16_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_subrev_u32           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_7>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_subrev_u32_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_subrev_u32_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_xor_b32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_xor_b32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
-    v_xor_b32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,      :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,     :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_add_co_u32           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_add_co_u32_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_add_co_u32_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_add_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_add_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_add_f16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_add_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_add_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_add_f32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_add_u16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_add_u16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_add_u16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_add_u32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_add_u32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_add_u32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_addc_co_u32          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`
+    v_addc_co_u32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_addc_co_u32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,    :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_and_b32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_and_b32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_and_b32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_ashrrev_i16          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_4de5c6>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_ashrrev_i16_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_ashrrev_i16_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_ashrrev_i32          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_e1561c>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_ashrrev_i32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_ashrrev_i32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cndmask_b32          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`
+    v_cndmask_b32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_cndmask_b32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,    :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_ldexp_f16            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`i16<amdgpu_synid_gfx9_type_deviation>`
+    v_ldexp_f16_dpp        :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`i16<amdgpu_synid_gfx9_type_deviation>`          :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_ldexp_f16_sdwa       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`::ref:`i16<amdgpu_synid_gfx9_type_deviation>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_lshlrev_b16          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_4de5c6>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_lshlrev_b16_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_lshlrev_b16_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_lshlrev_b32          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_e1561c>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_lshlrev_b32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_lshlrev_b32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_lshrrev_b16          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_4de5c6>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_lshrrev_b16_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_lshrrev_b16_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_lshrrev_b32          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_e1561c>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_lshrrev_b32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_lshrrev_b32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_mac_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_mac_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_mac_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_mac_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_madak_f16            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`,     :ref:`simm32<amdgpu_synid_gfx9_simm32_be0c1c>`
+    v_madak_f32            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`,     :ref:`simm32<amdgpu_synid_gfx9_simm32_6f0844>`
+    v_madmk_f16            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`simm32<amdgpu_synid_gfx9_simm32_be0c1c>`,    :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_madmk_f32            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`simm32<amdgpu_synid_gfx9_simm32_6f0844>`,    :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_max_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_max_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_max_f16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_max_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_max_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_max_f32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_max_i16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_max_i16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_max_i16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_max_i32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_max_i32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_max_i32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_max_u16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_max_u16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_max_u16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_max_u32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_max_u32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_max_u32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_min_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_min_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_min_f16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_min_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_min_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_min_f32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_min_i16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_min_i16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_min_i16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_min_i32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_min_i32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_min_i32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_min_u16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_min_u16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_min_u16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_min_u32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_min_u32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_min_u32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_mul_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_mul_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_mul_f16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_mul_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_mul_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_mul_f32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_mul_hi_i32_i24       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_mul_hi_i32_i24_dpp   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_mul_hi_i32_i24_sdwa  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_mul_hi_u32_u24       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_mul_hi_u32_u24_dpp   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_mul_hi_u32_u24_sdwa  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_mul_i32_i24          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_mul_i32_i24_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_mul_i32_i24_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_mul_legacy_f32       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_mul_legacy_f32_dpp   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_mul_legacy_f32_sdwa  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_mul_lo_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_mul_lo_u16_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_mul_lo_u16_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_mul_u32_u24          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_mul_u32_u24_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_mul_u32_u24_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_or_b32               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_or_b32_dpp           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_or_b32_sdwa          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_sub_co_u32           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_sub_co_u32_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_sub_co_u32_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_sub_f16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_sub_f16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_sub_f16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_sub_f32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_sub_f32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_sub_f32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_sub_u16              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_sub_u16_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_sub_u16_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_sub_u32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_sub_u32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_sub_u32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_subb_co_u32          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`
+    v_subb_co_u32_dpp      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_subb_co_u32_sdwa     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,    :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_subbrev_co_u32       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_e1561c>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`
+    v_subbrev_co_u32_dpp   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`,     :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_subbrev_co_u32_sdwa  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,    :ref:`vcc<amdgpu_synid_gfx9_vcc>`     :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_subrev_co_u32        :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_e1561c>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_subrev_co_u32_dpp    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_subrev_co_u32_sdwa   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx9_vcc>`, :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_subrev_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_e1561c>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_subrev_f16_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_subrev_f16_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_subrev_f32           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_e1561c>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_subrev_f32_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,    :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`            :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_subrev_f32_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_subrev_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_4de5c6>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_subrev_u16_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_subrev_u16_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_subrev_u32           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_e1561c>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_subrev_u32_dpp       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_subrev_u32_sdwa      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_xor_b32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,       :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_xor_b32_dpp          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`,      :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`              :ref:`dpp_ctrl<amdgpu_synid_dpp_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+    v_xor_b32_sdwa         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,      :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,     :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`             :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
 
 VOP3
------------------------
+----
 
 .. parsed-literal::
 
     **INSTRUCTION**                     **DST0**        **DST1**  **SRC0**         **SRC1**        **SRC2**           **MODIFIERS**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    v_add3_u32                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_add_co_u32_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`, :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_add_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_add_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_add_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_add_i16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`                       :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_add_i32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_add_lshl_u32                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_add_u16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_add_u32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_addc_co_u32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`, :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`ssrc2<amdgpu_synid_gfx9_ssrc_3>`          :ref:`clamp<amdgpu_synid_clamp>`
-    v_alignbit_b32                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`::ref:`b16<amdgpu_synid_gfx9_type_deviation>`
-    v_alignbyte_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`::ref:`b16<amdgpu_synid_gfx9_type_deviation>`
-    v_and_b32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_and_or_b32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_ashrrev_i16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_ashrrev_i32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_ashrrev_i64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_bcnt_u32_b32                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_bfe_i32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    v_bfe_u32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_bfi_b32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_bfm_b32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_bfrev_b32_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`
-    v_ceil_f16_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_ceil_f32_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_ceil_f64_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_add3_u32                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_add_co_u32_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_add_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_add_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_add_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_add_i16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                       :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_add_i32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_add_lshl_u32                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_add_u16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_add_u32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_addc_co_u32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`ssrc2<amdgpu_synid_gfx9_ssrc_e9f591>`          :ref:`clamp<amdgpu_synid_clamp>`
+    v_alignbit_b32                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`::ref:`b16<amdgpu_synid_gfx9_type_deviation>`
+    v_alignbyte_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`::ref:`b16<amdgpu_synid_gfx9_type_deviation>`
+    v_and_b32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_and_or_b32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_ashrrev_i16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_ashrrev_i32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_ashrrev_i64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_bcnt_u32_b32                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_bfe_i32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    v_bfe_u32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_bfi_b32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_bfm_b32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_bfrev_b32_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`
+    v_ceil_f16_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_ceil_f32_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_ceil_f64_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
     v_clrexcp_e64
-    v_cmp_class_f16_e64             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmp_class_f32_e64             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmp_class_f64_e64             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmp_eq_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_eq_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_eq_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_eq_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_eq_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_eq_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_eq_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_eq_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_eq_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_f_f16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_f_f32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_f_f64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_f_i16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_f_i32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_f_i64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_f_u16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_f_u32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_f_u64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_ge_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_ge_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_ge_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_ge_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_ge_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_ge_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_ge_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_ge_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_ge_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_gt_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_gt_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_gt_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_gt_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_gt_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_gt_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_gt_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_gt_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_gt_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_le_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_le_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_le_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_le_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_le_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_le_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_le_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_le_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_le_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_lg_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_lg_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_lg_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_lt_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_lt_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_lt_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_lt_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_lt_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_lt_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_lt_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_lt_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_lt_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_ne_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_ne_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_ne_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_ne_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_ne_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_ne_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_neq_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_neq_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_neq_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nge_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nge_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nge_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_ngt_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_ngt_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_ngt_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nle_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nle_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nle_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nlg_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nlg_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nlg_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nlt_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nlt_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_nlt_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_o_f16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_o_f32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_o_f64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_t_i16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_t_i32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_t_i64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_t_u16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmp_t_u32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmp_t_u64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmp_tru_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_tru_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_tru_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_u_f16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_u_f32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmp_u_f64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_class_f16_e64            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmpx_class_f32_e64            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmpx_class_f64_e64            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmpx_eq_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_eq_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_eq_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_eq_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_eq_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_eq_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_eq_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_eq_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_eq_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_f_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_f_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_f_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_f_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_f_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_f_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_f_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_f_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_f_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_ge_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_ge_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_ge_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_ge_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_ge_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_ge_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_ge_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_ge_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_ge_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_gt_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_gt_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_gt_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_gt_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_gt_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_gt_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_gt_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_gt_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_gt_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_le_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_le_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_le_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_le_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_le_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_le_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_le_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_le_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_le_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_lg_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_lg_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_lg_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_lt_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_lt_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_lt_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_lt_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_lt_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_lt_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_lt_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_lt_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_lt_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_ne_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_ne_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_ne_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_ne_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_ne_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_ne_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_neq_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_neq_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_neq_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nge_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nge_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nge_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_ngt_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_ngt_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_ngt_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nle_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nle_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nle_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nlg_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nlg_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nlg_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nlt_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nlt_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_nlt_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_o_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_o_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_o_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_t_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_t_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_t_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_t_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_cmpx_t_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_cmpx_t_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_cmpx_tru_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_tru_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_tru_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_u_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_u_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cmpx_u_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>`
-    v_cndmask_b32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`ssrc2<amdgpu_synid_gfx9_ssrc_3>`
-    v_cos_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cos_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cubeid_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cubema_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cubesc_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cubetc_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f16_f32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f16_i16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_10>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f16_u16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_10>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f32_f16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f32_f64_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f32_i32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f32_u32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f32_ubyte0_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f32_ubyte1_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f32_ubyte2_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f32_ubyte3_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f64_f32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f64_i32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_f64_u32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_flr_i32_f32_e64           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`
-    v_cvt_i16_f16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>`
-    v_cvt_i32_f32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>`
-    v_cvt_i32_f64_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>`
-    v_cvt_norm_i16_f16_e64          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>`
-    v_cvt_norm_u16_f16_e64          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>`
-    v_cvt_off_f32_i4_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_cvt_pk_i16_i32                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`
-    v_cvt_pk_u16_u32                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    v_cvt_pk_u8_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    v_cvt_pkaccum_u8_f32            :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
-    v_cvt_pknorm_i16_f16            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f16<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f16<amdgpu_synid_gfx9_type_deviation>`                 :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
-    v_cvt_pknorm_i16_f32            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`
-    v_cvt_pknorm_u16_f16            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f16<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f16<amdgpu_synid_gfx9_type_deviation>`                 :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
-    v_cvt_pknorm_u16_f32            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`
-    v_cvt_pkrtz_f16_f32             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`
-    v_cvt_rpi_i32_f32_e64           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`
-    v_cvt_u16_f16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>`
-    v_cvt_u32_f32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>`
-    v_cvt_u32_f64_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>`
-    v_div_fixup_f16                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_div_fixup_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_div_fixup_f64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_div_fixup_legacy_f16          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_div_fmas_f32                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_div_fmas_f64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_div_scale_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`vcc<amdgpu_synid_gfx9_vcc>`,  :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_div_scale_f64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`vcc<amdgpu_synid_gfx9_vcc>`,  :ref:`src0<amdgpu_synid_gfx9_src_9>`,        :ref:`src1<amdgpu_synid_gfx9_src_9>`,       :ref:`src2<amdgpu_synid_gfx9_src_9>`
-    v_exp_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_exp_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_exp_legacy_f32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_ffbh_i32_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`
-    v_ffbh_u32_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`
-    v_ffbl_b32_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`
-    v_floor_f16_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_floor_f32_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_floor_f64_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_fma_f16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_fma_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_fma_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_fma_legacy_f16                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_fract_f16_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_fract_f32_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_fract_f64_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_frexp_exp_i16_f16_e64         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`
-    v_frexp_exp_i32_f32_e64         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`
-    v_frexp_exp_i32_f64_e64         :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`
-    v_frexp_mant_f16_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_frexp_mant_f32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_frexp_mant_f64_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_interp_mov_f32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`param<amdgpu_synid_gfx9_param>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_interp_p1_f32_e64             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_interp_p1ll_f16               :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_interp_p1lv_f16               :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`, :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f16x2<amdgpu_synid_gfx9_type_deviation>`  :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_interp_p2_f16                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`, :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`    :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_interp_p2_f32_e64             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`vsrc<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_interp_p2_legacy_f16          :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`, :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`    :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_ldexp_f16_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`i16<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_ldexp_f32                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_ldexp_f64                     :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_lerp_u8                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_log_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_log_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_log_legacy_f32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_lshl_add_u32                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_lshl_or_b32                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_lshlrev_b16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_lshlrev_b32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_lshlrev_b64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_lshrrev_b16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_lshrrev_b32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_lshrrev_b64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_9>`
-    v_mac_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_mac_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_mad_f16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_mad_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_mad_i16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_mad_i32_i16                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`       :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_mad_i32_i24                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
-    v_mad_i64_i32                   :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`, :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_9>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
-    v_mad_legacy_f16                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_mad_legacy_f32                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_mad_legacy_i16                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`           :ref:`clamp<amdgpu_synid_clamp>`
-    v_mad_legacy_u16                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`           :ref:`clamp<amdgpu_synid_clamp>`
-    v_mad_u16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_mad_u32_u16                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_mad_u32_u24                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
-    v_mad_u64_u32                   :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`, :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_9>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
-    v_max3_f16                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_max3_f32                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_max3_i16                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
-    v_max3_i32                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_max3_u16                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
-    v_max3_u32                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_max_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_max_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_max_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_max_i16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_max_i32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_max_u16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_max_u32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_mbcnt_hi_u32_b32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_mbcnt_lo_u32_b32              :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_med3_f16                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_med3_f32                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_med3_i16                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
-    v_med3_i32                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_med3_u16                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
-    v_med3_u32                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_min3_f16                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_min3_f32                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,     :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_min3_i16                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
-    v_min3_i32                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_min3_u16                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`,       :ref:`src2<amdgpu_synid_gfx9_src_4>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
-    v_min3_u32                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_min_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_min_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_min_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_min_i16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_min_i32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_min_u16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_min_u32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_mov_b32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`
-    v_mqsad_pk_u16_u8               :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`::ref:`u16x4<amdgpu_synid_gfx9_type_deviation>`,       :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`u8x8<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src2<amdgpu_synid_gfx9_src_9>`::ref:`u16x4<amdgpu_synid_gfx9_type_deviation>`     :ref:`clamp<amdgpu_synid_clamp>`
-    v_mqsad_u32_u8                  :ref:`vdst<amdgpu_synid_gfx9_vdst_2>`::ref:`u32x4<amdgpu_synid_gfx9_type_deviation>`,       :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`u8x8<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_2>`::ref:`u32x4<amdgpu_synid_gfx9_type_deviation>`    :ref:`clamp<amdgpu_synid_clamp>`
-    v_msad_u8                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
-    v_mul_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_mul_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_mul_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_mul_hi_i32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_mul_hi_i32_i24_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_mul_hi_u32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_mul_hi_u32_u24_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_mul_i32_i24_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_mul_legacy_f32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_mul_lo_u16_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`
-    v_mul_lo_u32                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_mul_u32_u24_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_class_f16_e64             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmp_class_f32_e64             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmp_class_f64_e64             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmp_eq_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_eq_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_eq_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_eq_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_eq_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_eq_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_eq_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_eq_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_eq_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_f_f16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_f_f32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_f_f64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_f_i16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_f_i32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_f_i64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_f_u16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_f_u32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_f_u64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_ge_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_ge_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_ge_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_ge_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_ge_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_ge_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_ge_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_ge_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_ge_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_gt_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_gt_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_gt_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_gt_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_gt_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_gt_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_gt_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_gt_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_gt_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_le_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_le_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_le_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_le_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_le_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_le_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_le_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_le_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_le_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_lg_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_lg_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_lg_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_lt_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_lt_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_lt_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_lt_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_lt_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_lt_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_lt_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_lt_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_lt_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_ne_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_ne_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_ne_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_ne_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_ne_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_ne_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_neq_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_neq_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_neq_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nge_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nge_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nge_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_ngt_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_ngt_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_ngt_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nle_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nle_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nle_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nlg_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nlg_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nlg_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nlt_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nlt_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_nlt_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_o_f16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_o_f32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_o_f64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_t_i16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_t_i32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_t_i64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_t_u16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmp_t_u32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmp_t_u64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmp_tru_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_tru_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_tru_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_u_f16_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_u_f32_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmp_u_f64_e64                 :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_class_f16_e64            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmpx_class_f32_e64            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmpx_class_f64_e64            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmpx_eq_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_eq_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_eq_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_eq_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_eq_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_eq_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_eq_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_eq_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_eq_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_f_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_f_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_f_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_f_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_f_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_f_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_f_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_f_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_f_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_ge_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_ge_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_ge_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_ge_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_ge_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_ge_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_ge_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_ge_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_ge_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_gt_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_gt_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_gt_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_gt_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_gt_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_gt_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_gt_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_gt_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_gt_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_le_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_le_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_le_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_le_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_le_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_le_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_le_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_le_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_le_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_lg_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_lg_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_lg_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_lt_f16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_lt_f32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_lt_f64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_lt_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_lt_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_lt_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_lt_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_lt_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_lt_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_ne_i16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_ne_i32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_ne_i64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_ne_u16_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_ne_u32_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_ne_u64_e64               :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_neq_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_neq_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_neq_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nge_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nge_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nge_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_ngt_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_ngt_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_ngt_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nle_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nle_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nle_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nlg_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nlg_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nlg_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nlt_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nlt_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_nlt_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_o_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_o_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_o_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_t_i16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_t_i32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_t_i64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_t_u16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_cmpx_t_u32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_cmpx_t_u64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_cmpx_tru_f16_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_tru_f32_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_tru_f64_e64              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_u_f16_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_u_f32_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cmpx_u_f64_e64                :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>`
+    v_cndmask_b32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`ssrc2<amdgpu_synid_gfx9_ssrc_e9f591>`
+    v_cos_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cos_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cubeid_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cubema_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cubesc_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cubetc_f32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f16_f32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f16_i16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_955b45>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f16_u16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_955b45>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f32_f16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f32_f64_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f32_i32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f32_u32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f32_ubyte0_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f32_ubyte1_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f32_ubyte2_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f32_ubyte3_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f64_f32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f64_i32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_f64_u32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_flr_i32_f32_e64           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`
+    v_cvt_i16_f16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>`
+    v_cvt_i32_f32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>`
+    v_cvt_i32_f64_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>`
+    v_cvt_norm_i16_f16_e64          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>`
+    v_cvt_norm_u16_f16_e64          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>`
+    v_cvt_off_f32_i4_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`                                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_cvt_pk_i16_i32                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`
+    v_cvt_pk_u16_u32                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    v_cvt_pk_u8_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    v_cvt_pkaccum_u8_f32            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`
+    v_cvt_pknorm_i16_f16            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f16<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f16<amdgpu_synid_gfx9_type_deviation>`                 :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+    v_cvt_pknorm_i16_f32            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`
+    v_cvt_pknorm_u16_f16            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f16<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f16<amdgpu_synid_gfx9_type_deviation>`                 :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+    v_cvt_pknorm_u16_f32            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`
+    v_cvt_pkrtz_f16_f32             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`
+    v_cvt_rpi_i32_f32_e64           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`
+    v_cvt_u16_f16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>`
+    v_cvt_u32_f32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>`
+    v_cvt_u32_f64_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>`
+    v_div_fixup_f16                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_div_fixup_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_div_fixup_f64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_div_fixup_legacy_f16          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_div_fmas_f32                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_div_fmas_f64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_div_scale_f32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`vcc<amdgpu_synid_gfx9_vcc>`,  :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_div_scale_f64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`vcc<amdgpu_synid_gfx9_vcc>`,  :ref:`src0<amdgpu_synid_gfx9_src_f73668>`,        :ref:`src1<amdgpu_synid_gfx9_src_f73668>`,       :ref:`src2<amdgpu_synid_gfx9_src_f73668>`
+    v_exp_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_exp_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_exp_legacy_f32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_ffbh_i32_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`
+    v_ffbh_u32_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`
+    v_ffbl_b32_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`
+    v_floor_f16_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_floor_f32_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_floor_f64_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_fma_f16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_fma_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_fma_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_fma_legacy_f16                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_fract_f16_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_fract_f32_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_fract_f64_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_frexp_exp_i16_f16_e64         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`
+    v_frexp_exp_i32_f32_e64         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`
+    v_frexp_exp_i32_f64_e64         :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`
+    v_frexp_mant_f16_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_frexp_mant_f32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_frexp_mant_f64_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_interp_mov_f32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`param<amdgpu_synid_gfx9_param>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_interp_p1_f32_e64             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_interp_p1ll_f16               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,  :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_interp_p1lv_f16               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`, :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f16x2<amdgpu_synid_gfx9_type_deviation>`  :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_interp_p2_f16                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`, :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`    :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_interp_p2_f32_e64             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`vsrc<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_interp_p2_legacy_f16          :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`vsrc0<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`, :ref:`attr<amdgpu_synid_gfx9_attr>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`::ref:`f32<amdgpu_synid_gfx9_type_deviation>`    :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_ldexp_f16_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`i16<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_ldexp_f32                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_ldexp_f64                     :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_lerp_u8                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_log_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_log_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_log_legacy_f32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_lshl_add_u32                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_lshl_or_b32                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_lshlrev_b16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_lshlrev_b32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_lshlrev_b64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_lshrrev_b16_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`u16<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_lshrrev_b32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_lshrrev_b64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,    :ref:`src1<amdgpu_synid_gfx9_src_f73668>`
+    v_mac_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_mac_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_mad_f16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_mad_f32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_mad_i16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_mad_i32_i16                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`       :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_mad_i32_i24                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`i32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
+    v_mad_i64_i32                   :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_f73668>`::ref:`i64<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
+    v_mad_legacy_f16                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_mad_legacy_f32                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_mad_legacy_i16                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`           :ref:`clamp<amdgpu_synid_clamp>`
+    v_mad_legacy_u16                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`           :ref:`clamp<amdgpu_synid_clamp>`
+    v_mad_u16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_mad_u32_u16                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_mad_u32_u24                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
+    v_mad_u64_u32                   :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_f73668>`::ref:`u64<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
+    v_max3_f16                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_max3_f32                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_max3_i16                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+    v_max3_i32                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_max3_u16                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+    v_max3_u32                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_max_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_max_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_max_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_max_i16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_max_i32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_max_u16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_max_u32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_mbcnt_hi_u32_b32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_mbcnt_lo_u32_b32              :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_med3_f16                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_med3_f32                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_med3_i16                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+    v_med3_i32                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_med3_u16                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+    v_med3_u32                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_min3_f16                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_min3_f32                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,     :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`         :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_min3_i16                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+    v_min3_i32                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_min3_u16                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,       :ref:`src2<amdgpu_synid_gfx9_src_d95796>`           :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+    v_min3_u32                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_min_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_min_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_min_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_min_i16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_min_i32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_min_u16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_min_u32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_mov_b32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`
+    v_mqsad_pk_u16_u8               :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`::ref:`u16x4<amdgpu_synid_gfx9_type_deviation>`,       :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`u8x8<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src2<amdgpu_synid_gfx9_src_f73668>`::ref:`u16x4<amdgpu_synid_gfx9_type_deviation>`     :ref:`clamp<amdgpu_synid_clamp>`
+    v_mqsad_u32_u8                  :ref:`vdst<amdgpu_synid_gfx9_vdst_69a144>`::ref:`u32x4<amdgpu_synid_gfx9_type_deviation>`,       :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`u8x8<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`vsrc2<amdgpu_synid_gfx9_vsrc_e016a1>`::ref:`u32x4<amdgpu_synid_gfx9_type_deviation>`    :ref:`clamp<amdgpu_synid_clamp>`
+    v_msad_u8                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
+    v_mul_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_mul_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_mul_f64                       :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_mul_hi_i32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_mul_hi_i32_i24_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_mul_hi_u32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_mul_hi_u32_u24_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_mul_i32_i24_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_mul_legacy_f32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_mul_lo_u16_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`
+    v_mul_lo_u32                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_mul_u32_u24_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                       :ref:`clamp<amdgpu_synid_clamp>`
     v_nop_e64
-    v_not_b32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`
-    v_or3_b32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_or_b32_e64                    :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
-    v_pack_b32_f16                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
-    v_perm_b32                      :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_qsad_pk_u16_u8                :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`::ref:`u16x4<amdgpu_synid_gfx9_type_deviation>`,       :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`u8x8<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src2<amdgpu_synid_gfx9_src_9>`::ref:`u16x4<amdgpu_synid_gfx9_type_deviation>`     :ref:`clamp<amdgpu_synid_clamp>`
-    v_rcp_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_rcp_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_rcp_f64_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_rcp_iflag_f32_e64             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_readlane_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_7>`,             :ref:`src0<amdgpu_synid_gfx9_src_5>`,        :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_7>`
-    v_rndne_f16_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_rndne_f32_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_rndne_f64_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_rsq_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_rsq_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_rsq_f64_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_sad_hi_u8                     :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
-    v_sad_u16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`u16x2<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u16x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
-    v_sad_u32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`           :ref:`clamp<amdgpu_synid_clamp>`
-    v_sad_u8                        :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src2<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
-    v_sat_pk_u8_i16_e64             :ref:`vdst<amdgpu_synid_gfx9_vdst>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,        :ref:`src<amdgpu_synid_gfx9_src_8>`
-    v_screen_partition_4se_b32_e64  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`
-    v_sin_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_sin_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_sqrt_f16_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_sqrt_f32_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_sqrt_f64_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_sub_co_u32_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`, :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_sub_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_sub_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_sub_i16                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`                       :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_sub_i32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_sub_u16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_10>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_sub_u32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_subb_co_u32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`, :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`ssrc2<amdgpu_synid_gfx9_ssrc_3>`          :ref:`clamp<amdgpu_synid_clamp>`
-    v_subbrev_co_u32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`, :ref:`src0<amdgpu_synid_gfx9_src_1>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`ssrc2<amdgpu_synid_gfx9_ssrc_3>`          :ref:`clamp<amdgpu_synid_clamp>`
-    v_subrev_co_u32_e64             :ref:`vdst<amdgpu_synid_gfx9_vdst>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`, :ref:`src0<amdgpu_synid_gfx9_src_1>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_subrev_f16_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_subrev_f32_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_subrev_u16_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_4>`,        :ref:`src1<amdgpu_synid_gfx9_src_4>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_subrev_u32_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_1>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`                       :ref:`clamp<amdgpu_synid_clamp>`
-    v_trig_preop_f64                :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src0<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`,      :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_trunc_f16_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_trunc_f32_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src<amdgpu_synid_gfx9_src_8>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_trunc_f64_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_1>`,             :ref:`src<amdgpu_synid_gfx9_src_9>`::ref:`m<amdgpu_synid_gfx9_m_1>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
-    v_writelane_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_8>`,       :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_7>`
-    v_xad_u32                       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`,       :ref:`src2<amdgpu_synid_gfx9_src_1>`
-    v_xor_b32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst>`,             :ref:`src0<amdgpu_synid_gfx9_src_8>`,        :ref:`src1<amdgpu_synid_gfx9_src_1>`
+    v_not_b32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`
+    v_or3_b32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_or_b32_e64                    :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
+    v_pack_b32_f16                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+    v_perm_b32                      :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_qsad_pk_u16_u8                :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`::ref:`u16x4<amdgpu_synid_gfx9_type_deviation>`,       :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`u8x8<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src2<amdgpu_synid_gfx9_src_f73668>`::ref:`u16x4<amdgpu_synid_gfx9_type_deviation>`     :ref:`clamp<amdgpu_synid_clamp>`
+    v_rcp_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_rcp_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_rcp_f64_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_rcp_iflag_f32_e64             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_readlane_b32                  :ref:`sdst<amdgpu_synid_gfx9_sdst_59204c>`,             :ref:`src0<amdgpu_synid_gfx9_src_516946>`,        :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_57838b>`
+    v_rndne_f16_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_rndne_f32_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_rndne_f64_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_rsq_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_rsq_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_rsq_f64_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_sad_hi_u8                     :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
+    v_sad_u16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`u16x2<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u16x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
+    v_sad_u32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`           :ref:`clamp<amdgpu_synid_clamp>`
+    v_sad_u8                        :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`,         :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,  :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`       :ref:`clamp<amdgpu_synid_clamp>`
+    v_sat_pk_u8_i16_e64             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx9_type_deviation>`,        :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`
+    v_screen_partition_4se_b32_e64  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`
+    v_sin_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_sin_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_sqrt_f16_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_sqrt_f32_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_sqrt_f64_e64                  :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_sub_co_u32_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_sub_f16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_sub_f32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_sub_i16                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                       :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_sub_i32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_sub_u16_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_sub_u32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_subb_co_u32_e64               :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`ssrc2<amdgpu_synid_gfx9_ssrc_e9f591>`          :ref:`clamp<amdgpu_synid_clamp>`
+    v_subbrev_co_u32_e64            :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`ssrc2<amdgpu_synid_gfx9_ssrc_e9f591>`          :ref:`clamp<amdgpu_synid_clamp>`
+    v_subrev_co_u32_e64             :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,       :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_subrev_f16_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_subrev_f32_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                     :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_subrev_u16_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d95796>`,        :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_subrev_u32_e64                :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                       :ref:`clamp<amdgpu_synid_clamp>`
+    v_trig_preop_f64                :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src0<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,      :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`u32<amdgpu_synid_gfx9_type_deviation>`                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_trunc_f16_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_trunc_f32_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src<amdgpu_synid_gfx9_src_4e78e6>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_trunc_f64_e64                 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`,             :ref:`src<amdgpu_synid_gfx9_src_f73668>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`                                   :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+    v_writelane_b32                 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`ssrc0<amdgpu_synid_gfx9_ssrc_4db4a9>`,       :ref:`ssrc1<amdgpu_synid_gfx9_ssrc_57838b>`
+    v_xad_u32                       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,       :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`
+    v_xor_b32_e64                   :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,             :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,        :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`
 
 VOP3P
------------------------
+-----
 
 .. parsed-literal::
 
     **INSTRUCTION**            **DST**      **SRC0**        **SRC1**     **SRC2**       **MODIFIERS**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    v_pk_add_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_8>`,       :ref:`src1<amdgpu_synid_gfx9_src_1>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_pk_add_i16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_10>`,       :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_pk_add_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_10>`,       :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_pk_ashrrev_i16       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`u16x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
-    v_pk_fma_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_8>`,       :ref:`src1<amdgpu_synid_gfx9_src_1>`,    :ref:`src2<amdgpu_synid_gfx9_src_1>`       :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_pk_lshlrev_b16       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`u16x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
-    v_pk_lshrrev_b16       :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`u16x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
-    v_pk_mad_i16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_10>`,       :ref:`src1<amdgpu_synid_gfx9_src_4>`,    :ref:`src2<amdgpu_synid_gfx9_src_4>`       :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_pk_mad_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_10>`,       :ref:`src1<amdgpu_synid_gfx9_src_4>`,    :ref:`src2<amdgpu_synid_gfx9_src_4>`       :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_pk_max_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_8>`,       :ref:`src1<amdgpu_synid_gfx9_src_1>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_pk_max_i16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_10>`,       :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
-    v_pk_max_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_10>`,       :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
-    v_pk_min_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_8>`,       :ref:`src1<amdgpu_synid_gfx9_src_1>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_pk_min_i16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_10>`,       :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
-    v_pk_min_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_10>`,       :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
-    v_pk_mul_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_8>`,       :ref:`src1<amdgpu_synid_gfx9_src_1>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_pk_mul_lo_u16        :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_10>`,       :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
-    v_pk_sub_i16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_10>`,       :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
-    v_pk_sub_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst>`,    :ref:`src0<amdgpu_synid_gfx9_src_10>`,       :ref:`src1<amdgpu_synid_gfx9_src_4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_pk_add_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,       :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_pk_add_i16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,       :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_pk_add_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,       :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_pk_ashrrev_i16       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`u16x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+    v_pk_fma_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,       :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`,    :ref:`src2<amdgpu_synid_gfx9_src_d578c4>`       :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_pk_lshlrev_b16       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`u16x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+    v_pk_lshrrev_b16       :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`u16x2<amdgpu_synid_gfx9_type_deviation>`, :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+    v_pk_mad_i16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,       :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,    :ref:`src2<amdgpu_synid_gfx9_src_d95796>`       :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_pk_mad_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,       :ref:`src1<amdgpu_synid_gfx9_src_d95796>`,    :ref:`src2<amdgpu_synid_gfx9_src_d95796>`       :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_pk_max_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,       :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_pk_max_i16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,       :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+    v_pk_max_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,       :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+    v_pk_min_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,       :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_pk_min_i16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,       :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+    v_pk_min_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,       :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+    v_pk_mul_f16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_4e78e6>`,       :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_pk_mul_lo_u16        :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,       :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+    v_pk_sub_i16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,       :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+    v_pk_sub_u16           :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`,    :ref:`src0<amdgpu_synid_gfx9_src_955b45>`,       :ref:`src1<amdgpu_synid_gfx9_src_d95796>`                :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
 
 VOPC
------------------------
+----
 
 .. parsed-literal::
 
     **INSTRUCTION**                    **DST**       **SRC0**      **SRC1**            **MODIFIERS**
     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
-    v_cmp_class_f16                :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmp_class_f16_sdwa           :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`      :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_class_f32                :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmp_class_f32_sdwa           :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`      :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_class_f64                :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmp_eq_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_eq_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_eq_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_eq_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_eq_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_eq_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_eq_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_eq_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_eq_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_eq_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_eq_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_eq_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_eq_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_eq_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_eq_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_f_f16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_f_f16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_f_f32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_f_f32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_f_f64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_f_i16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_f_i16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_f_i32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_f_i32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_f_i64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_f_u16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_f_u16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_f_u32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_f_u32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_f_u64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_ge_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ge_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ge_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ge_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ge_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_ge_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ge_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ge_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ge_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ge_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_ge_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ge_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ge_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ge_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ge_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_gt_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_gt_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_gt_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_gt_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_gt_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_gt_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_gt_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_gt_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_gt_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_gt_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_gt_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_gt_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_gt_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_gt_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_gt_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_le_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_le_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_le_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_le_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_le_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_le_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_le_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_le_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_le_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_le_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_le_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_le_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_le_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_le_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_le_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_lg_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_lg_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_lg_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_lg_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_lg_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_lt_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_lt_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_lt_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_lt_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_lt_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_lt_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_lt_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_lt_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_lt_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_lt_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_lt_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_lt_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_lt_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_lt_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_lt_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_ne_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ne_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ne_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ne_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ne_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_ne_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ne_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ne_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ne_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ne_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_neq_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_neq_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_neq_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_neq_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_neq_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_nge_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_nge_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_nge_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_nge_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_nge_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_ngt_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ngt_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ngt_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_ngt_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_ngt_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_nle_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_nle_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_nle_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_nle_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_nle_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_nlg_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_nlg_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_nlg_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_nlg_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_nlg_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_nlt_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_nlt_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_nlt_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_nlt_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_nlt_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_o_f16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_o_f16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_o_f32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_o_f32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_o_f64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_t_i16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_t_i16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_t_i32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_t_i32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_t_i64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_t_u16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_t_u16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_t_u32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_t_u32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_t_u64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_tru_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_tru_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_tru_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_tru_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_tru_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmp_u_f16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_u_f16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_u_f32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmp_u_f32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_2>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmp_u_f64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_class_f16               :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmpx_class_f16_sdwa          :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`      :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_class_f32               :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmpx_class_f32_sdwa          :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`      :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_class_f64               :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
-    v_cmpx_eq_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_eq_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_eq_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_eq_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_eq_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_eq_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_eq_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_eq_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_eq_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_eq_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_eq_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_eq_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_eq_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_eq_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_eq_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_f_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_f_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_f_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_f_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_f_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_f_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_f_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_f_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_f_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_f_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_f_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_f_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_f_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_f_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_f_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_ge_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ge_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ge_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ge_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ge_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_ge_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ge_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ge_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ge_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ge_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_ge_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ge_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ge_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ge_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ge_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_gt_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_gt_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_gt_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_gt_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_gt_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_gt_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_gt_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_gt_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_gt_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_gt_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_gt_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_gt_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_gt_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_gt_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_gt_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_le_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_le_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_le_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_le_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_le_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_le_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_le_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_le_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_le_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_le_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_le_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_le_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_le_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_le_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_le_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_lg_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_lg_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_lg_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_lg_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_lg_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_lt_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_lt_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_lt_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_lt_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_lt_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_lt_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_lt_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_lt_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_lt_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_lt_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_lt_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_lt_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_lt_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_lt_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_lt_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_ne_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ne_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ne_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ne_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ne_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_ne_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ne_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ne_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ne_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ne_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_neq_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_neq_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_neq_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_neq_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_neq_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_nge_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_nge_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_nge_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_nge_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_nge_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_ngt_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ngt_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ngt_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_ngt_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_ngt_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_nle_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_nle_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_nle_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_nle_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_nle_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_nlg_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_nlg_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_nlg_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_nlg_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_nlg_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_nlt_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_nlt_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_nlt_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_nlt_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_nlt_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_o_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_o_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_o_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_o_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_o_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_t_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_t_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_t_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_t_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_t_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_t_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_3>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_t_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_4>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_t_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_t_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_t_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_tru_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_tru_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_tru_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_tru_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_tru_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
-    v_cmpx_u_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_u_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_u_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_1>`
-    v_cmpx_u_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_6>`,     :ref:`src0<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`,   :ref:`src1<amdgpu_synid_gfx9_src_1>`::ref:`m<amdgpu_synid_gfx9_m_1>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
-    v_cmpx_u_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_2>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_3>`
+    v_cmp_class_f16                :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmp_class_f16_sdwa           :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`      :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_class_f32                :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmp_class_f32_sdwa           :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`      :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_class_f64                :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmp_eq_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_eq_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_eq_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_eq_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_eq_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_eq_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_eq_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_eq_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_eq_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_eq_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_eq_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_eq_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_eq_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_eq_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_eq_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_f_f16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_f_f16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_f_f32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_f_f32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_f_f64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_f_i16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_f_i16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_f_i32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_f_i32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_f_i64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_f_u16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_f_u16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_f_u32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_f_u32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_f_u64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_ge_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ge_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ge_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ge_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ge_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_ge_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ge_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ge_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ge_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ge_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_ge_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ge_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ge_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ge_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ge_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_gt_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_gt_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_gt_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_gt_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_gt_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_gt_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_gt_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_gt_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_gt_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_gt_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_gt_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_gt_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_gt_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_gt_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_gt_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_le_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_le_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_le_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_le_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_le_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_le_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_le_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_le_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_le_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_le_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_le_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_le_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_le_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_le_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_le_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_lg_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_lg_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_lg_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_lg_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_lg_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_lt_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_lt_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_lt_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_lt_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_lt_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_lt_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_lt_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_lt_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_lt_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_lt_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_lt_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_lt_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_lt_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_lt_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_lt_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_ne_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ne_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ne_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ne_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ne_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_ne_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ne_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ne_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ne_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ne_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_neq_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_neq_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_neq_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_neq_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_neq_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_nge_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_nge_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_nge_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_nge_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_nge_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_ngt_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ngt_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ngt_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_ngt_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_ngt_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_nle_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_nle_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_nle_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_nle_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_nle_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_nlg_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_nlg_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_nlg_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_nlg_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_nlg_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_nlt_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_nlt_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_nlt_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_nlt_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_nlt_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_o_f16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_o_f16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_o_f32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_o_f32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_o_f64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_t_i16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_t_i16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_t_i32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_t_i32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_t_i64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_t_u16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_t_u16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_t_u32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_t_u32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_t_u64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_tru_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_tru_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_tru_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_tru_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_tru_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmp_u_f16                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_u_f16_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_u_f32                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmp_u_f32_sdwa               :ref:`sdst<amdgpu_synid_gfx9_sdst_718cc4>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmp_u_f64                    :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_class_f16               :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmpx_class_f16_sdwa          :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`      :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_class_f32               :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmpx_class_f32_sdwa          :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`      :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_class_f64               :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx9_type_deviation>`
+    v_cmpx_eq_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_eq_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_eq_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_eq_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_eq_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_eq_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_eq_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_eq_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_eq_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_eq_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_eq_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_eq_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_eq_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_eq_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_eq_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_f_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_f_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_f_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_f_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_f_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_f_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_f_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_f_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_f_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_f_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_f_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_f_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_f_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_f_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_f_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_ge_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ge_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ge_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ge_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ge_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_ge_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ge_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ge_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ge_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ge_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_ge_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ge_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ge_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ge_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ge_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_gt_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_gt_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_gt_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_gt_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_gt_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_gt_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_gt_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_gt_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_gt_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_gt_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_gt_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_gt_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_gt_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_gt_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_gt_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_le_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_le_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_le_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_le_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_le_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_le_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_le_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_le_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_le_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_le_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_le_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_le_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_le_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_le_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_le_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_lg_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_lg_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_lg_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_lg_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_lg_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_lt_f16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_lt_f16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_lt_f32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_lt_f32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_lt_f64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_lt_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_lt_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_lt_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_lt_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_lt_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_lt_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_lt_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_lt_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_lt_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_lt_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_ne_i16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ne_i16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ne_i32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ne_i32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ne_i64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_ne_u16                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ne_u16_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ne_u32                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ne_u32_sdwa             :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ne_u64                  :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_neq_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_neq_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_neq_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_neq_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_neq_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_nge_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_nge_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_nge_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_nge_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_nge_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_ngt_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ngt_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ngt_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_ngt_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_ngt_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_nle_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_nle_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_nle_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_nle_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_nle_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_nlg_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_nlg_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_nlg_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_nlg_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_nlg_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_nlt_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_nlt_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_nlt_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_nlt_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_nlt_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_o_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_o_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_o_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_o_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_o_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_t_i16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_t_i16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_t_i32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_t_i32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_t_i64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_t_u16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_089570>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_t_u16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d95796>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_t_u32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_t_u32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_254bcb>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_t_u64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_tru_f16                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_tru_f16_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_tru_f32                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_tru_f32_sdwa            :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_tru_f64                 :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
+    v_cmpx_u_f16                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_u_f16_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_u_f32                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_73ab34>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_6802ce>`
+    v_cmpx_u_f32_sdwa              :ref:`sdst<amdgpu_synid_gfx9_sdst_a319e6>`,     :ref:`src0<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`,   :ref:`src1<amdgpu_synid_gfx9_src_d578c4>`::ref:`m<amdgpu_synid_gfx9_m_f5d306>`          :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+    v_cmpx_u_f64                   :ref:`vcc<amdgpu_synid_gfx9_vcc>`,      :ref:`src0<amdgpu_synid_gfx9_src_56ed80>`,     :ref:`vsrc1<amdgpu_synid_gfx9_vsrc_fd235e>`
 
 .. |---| unicode:: U+02014 .. em dash
 
@@ -2030,104 +2030,104 @@ VOPC
     gfx9_dst
     gfx9_hwreg
     gfx9_imask
-    gfx9_imm16
-    gfx9_imm16_1
-    gfx9_imm16_2
+    gfx9_imm16_73139a
+    gfx9_imm16_a04fb3
     gfx9_label
-    gfx9_m
-    gfx9_m_1
+    gfx9_m_254bcb
+    gfx9_m_f5d306
     gfx9_msg
-    gfx9_opt
+    gfx9_opt_0d447d
+    gfx9_opt_847aed
     gfx9_param
     gfx9_probe
-    gfx9_saddr
-    gfx9_saddr_1
-    gfx9_sbase
-    gfx9_sbase_1
-    gfx9_sbase_2
-    gfx9_sdata
-    gfx9_sdata_1
-    gfx9_sdata_2
-    gfx9_sdata_3
-    gfx9_sdata_4
-    gfx9_sdata_5
-    gfx9_sdst
-    gfx9_sdst_1
-    gfx9_sdst_2
-    gfx9_sdst_3
-    gfx9_sdst_4
-    gfx9_sdst_5
-    gfx9_sdst_6
-    gfx9_sdst_7
-    gfx9_simm32
-    gfx9_simm32_1
-    gfx9_simm32_2
-    gfx9_soffset
-    gfx9_soffset_1
-    gfx9_soffset_2
-    gfx9_src
-    gfx9_src_1
-    gfx9_src_10
-    gfx9_src_2
-    gfx9_src_3
-    gfx9_src_4
-    gfx9_src_5
-    gfx9_src_6
-    gfx9_src_7
-    gfx9_src_8
-    gfx9_src_9
-    gfx9_srsrc
-    gfx9_srsrc_1
+    gfx9_saddr_6060e5
+    gfx9_saddr_a37373
+    gfx9_sbase_010ce0
+    gfx9_sbase_044055
+    gfx9_sbase_0cd545
+    gfx9_sdata_595c25
+    gfx9_sdata_7cbd60
+    gfx9_sdata_aefe00
+    gfx9_sdata_c6aec1
+    gfx9_sdata_e9f591
+    gfx9_sdata_eb6f2a
+    gfx9_sdst_06b266
+    gfx9_sdst_0804b1
+    gfx9_sdst_362c37
+    gfx9_sdst_3bc700
+    gfx9_sdst_59204c
+    gfx9_sdst_718cc4
+    gfx9_sdst_94342d
+    gfx9_sdst_a319e6
+    gfx9_simm32_6f0844
+    gfx9_simm32_a3e80c
+    gfx9_simm32_be0c1c
+    gfx9_soffset_4318ca
+    gfx9_soffset_8a17c8
+    gfx9_soffset_ba92ce
+    gfx9_src_089570
+    gfx9_src_4de5c6
+    gfx9_src_4e78e6
+    gfx9_src_516946
+    gfx9_src_56ed80
+    gfx9_src_73ab34
+    gfx9_src_955b45
+    gfx9_src_d578c4
+    gfx9_src_d95796
+    gfx9_src_e1561c
+    gfx9_src_f73668
+    gfx9_srsrc_79ffcd
+    gfx9_srsrc_e73d16
     gfx9_ssamp
-    gfx9_ssrc
-    gfx9_ssrc_1
-    gfx9_ssrc_2
-    gfx9_ssrc_3
-    gfx9_ssrc_4
-    gfx9_ssrc_5
-    gfx9_ssrc_6
-    gfx9_ssrc_7
-    gfx9_ssrc_8
+    gfx9_ssrc_4db4a9
+    gfx9_ssrc_57838b
+    gfx9_ssrc_595c25
+    gfx9_ssrc_65f041
+    gfx9_ssrc_aee59c
+    gfx9_ssrc_c31902
+    gfx9_ssrc_c5d631
+    gfx9_ssrc_c8a322
+    gfx9_ssrc_e9f591
     gfx9_tgt
     gfx9_type_deviation
-    gfx9_vaddr
-    gfx9_vaddr_1
-    gfx9_vaddr_2
-    gfx9_vaddr_3
-    gfx9_vaddr_4
-    gfx9_vaddr_5
+    gfx9_vaddr_0212e3
+    gfx9_vaddr_5d0b42
+    gfx9_vaddr_76b997
+    gfx9_vaddr_9f7133
+    gfx9_vaddr_b73dc0
+    gfx9_vaddr_f20ee4
     gfx9_vcc
-    gfx9_vdata
-    gfx9_vdata0
-    gfx9_vdata0_1
-    gfx9_vdata1
-    gfx9_vdata1_1
-    gfx9_vdata_1
-    gfx9_vdata_10
-    gfx9_vdata_2
-    gfx9_vdata_3
-    gfx9_vdata_4
-    gfx9_vdata_5
-    gfx9_vdata_6
-    gfx9_vdata_7
-    gfx9_vdata_8
-    gfx9_vdata_9
-    gfx9_vdst
-    gfx9_vdst_1
-    gfx9_vdst_10
-    gfx9_vdst_11
-    gfx9_vdst_12
-    gfx9_vdst_13
-    gfx9_vdst_2
-    gfx9_vdst_3
-    gfx9_vdst_4
-    gfx9_vdst_5
-    gfx9_vdst_6
-    gfx9_vdst_7
-    gfx9_vdst_8
-    gfx9_vdst_9
-    gfx9_vsrc
-    gfx9_vsrc_1
-    gfx9_vsrc_2
-    gfx9_vsrc_3
+    gfx9_vdata0_6802ce
+    gfx9_vdata0_fd235e
+    gfx9_vdata1_6802ce
+    gfx9_vdata1_fd235e
+    gfx9_vdata_0aba12
+    gfx9_vdata_15d255
+    gfx9_vdata_16d321
+    gfx9_vdata_35851e
+    gfx9_vdata_56f215
+    gfx9_vdata_6802ce
+    gfx9_vdata_890652
+    gfx9_vdata_a9ff5a
+    gfx9_vdata_c08393
+    gfx9_vdata_e016a1
+    gfx9_vdata_fd235e
+    gfx9_vdst_2ea017
+    gfx9_vdst_322561
+    gfx9_vdst_3d7dcf
+    gfx9_vdst_463513
+    gfx9_vdst_473a69
+    gfx9_vdst_48e42f
+    gfx9_vdst_69a144
+    gfx9_vdst_709347
+    gfx9_vdst_81a6ed
+    gfx9_vdst_89680f
+    gfx9_vdst_bdb32f
+    gfx9_vdst_d0dc43
+    gfx9_vdst_d71f1c
+    gfx9_vdst_dd8a32
+    gfx9_vsrc_533a4e
+    gfx9_vsrc_6802ce
+    gfx9_vsrc_e016a1
+    gfx9_vsrc_fd235e
     gfx9_waitcnt

diff --git a/llvm/docs/AMDGPU/gfx9_hwreg.rst b/llvm/docs/AMDGPU/gfx9_hwreg.rst
index c949da6..c040c58 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_hwreg.rst
+++ b/llvm/docs/AMDGPU/gfx9_hwreg.rst
@@ -41,22 +41,22 @@ or :ref:`absolute expressions<amdgpu_synid_absolute_expression>`.
 
 Defined register *names* include:
 
-    =================== ==========================================
-    Name                Description
-    =================== ==========================================
-    HW_REG_MODE         Shader writeable mode bits.
-    HW_REG_STATUS       Shader read-only status.
-    HW_REG_TRAPSTS      Trap status.
-    HW_REG_HW_ID        Id of wave, simd, compute unit, etc.
-    HW_REG_GPR_ALLOC    Per-wave SGPR and VGPR allocation.
-    HW_REG_LDS_ALLOC    Per-wave LDS allocation.
-    HW_REG_IB_STS       Counters of outstanding instructions.
-    HW_REG_SH_MEM_BASES Memory aperture.
-    HW_REG_TBA_LO       tba_lo register.
-    HW_REG_TBA_HI       tba_hi register.
-    HW_REG_TMA_LO       tma_lo register.
-    HW_REG_TMA_HI       tma_hi register.
-    =================== ==========================================
+    ============================== ==========================================
+    Name                           Description
+    ============================== ==========================================
+    HW_REG_MODE                    Shader writeable mode bits.
+    HW_REG_STATUS                  Shader read-only status.
+    HW_REG_TRAPSTS                 Trap status.
+    HW_REG_HW_ID                   Id of wave, simd, compute unit, etc.
+    HW_REG_GPR_ALLOC               Per-wave SGPR and VGPR allocation.
+    HW_REG_LDS_ALLOC               Per-wave LDS allocation.
+    HW_REG_IB_STS                  Counters of outstanding instructions.
+    HW_REG_SH_MEM_BASES            Memory aperture.
+    HW_REG_TBA_LO                  tba_lo register.
+    HW_REG_TBA_HI                  tba_hi register.
+    HW_REG_TMA_LO                  tma_lo register.
+    HW_REG_TMA_HI                  tma_hi register.
+    ============================== ==========================================
 
 Examples:
 

diff --git a/llvm/docs/AMDGPU/gfx9_imm16_2.rst b/llvm/docs/AMDGPU/gfx9_imm16_2.rst
deleted file mode 100644 (file)
index f718874..0000000
--- a/llvm/docs/AMDGPU/gfx9_imm16_2.rst
+++ /dev/null
@@ -1,13 +0,0 @@
-..
-    **************************************************
-    *                                                *
-    *   Automatically generated file, do not edit!   *
-    *                                                *
-    **************************************************
-
-.. _amdgpu_synid_gfx9_imm16_2:
-
-imm16
-=====
-
-A 16-bit :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.

diff --git a/llvm/docs/AMDGPU/gfx9_imm16.rst b/llvm/docs/AMDGPU/gfx9_imm16_73139a.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx9_imm16.rst
rename to llvm/docs/AMDGPU/gfx9_imm16_73139a.rst
index 713a63b..0028de6 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_imm16.rst
+++ b/llvm/docs/AMDGPU/gfx9_imm16_73139a.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_imm16:
+.. _amdgpu_synid_gfx9_imm16_73139a:
 
 imm16
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_imm16_1.rst b/llvm/docs/AMDGPU/gfx9_imm16_a04fb3.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx9_imm16_1.rst
rename to llvm/docs/AMDGPU/gfx9_imm16_a04fb3.rst
index 2ce77ef..ad63808 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_imm16_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_imm16_a04fb3.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_imm16_1:
+.. _amdgpu_synid_gfx9_imm16_a04fb3:
 
 imm16
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_m.rst b/llvm/docs/AMDGPU/gfx9_m_254bcb.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx9_m.rst
rename to llvm/docs/AMDGPU/gfx9_m_254bcb.rst
index e7759aa..f2302d0 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_m.rst
+++ b/llvm/docs/AMDGPU/gfx9_m_254bcb.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_m:
+.. _amdgpu_synid_gfx9_m_254bcb:
 
 m
 =

diff --git a/llvm/docs/AMDGPU/gfx9_m_1.rst b/llvm/docs/AMDGPU/gfx9_m_f5d306.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx9_m_1.rst
rename to llvm/docs/AMDGPU/gfx9_m_f5d306.rst
index f4dec59..c484620 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_m_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_m_f5d306.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_m_1:
+.. _amdgpu_synid_gfx9_m_f5d306:
 
 m
 =

diff --git a/llvm/docs/AMDGPU/gfx9_msg.rst b/llvm/docs/AMDGPU/gfx9_msg.rst
index 34be1c8..96a5246 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_msg.rst
+++ b/llvm/docs/AMDGPU/gfx9_msg.rst
@@ -67,7 +67,6 @@ Each message type supports specific operations:
     MSG_GET_DOORBELL       10         \-                             \-           \-
     MSG_SYSMSG             15         SYSMSG_OP_ECC_ERR_INTERRUPT    1            \-
     \                                 SYSMSG_OP_REG_RD               2            \-
-    \                                 SYSMSG_OP_HOST_TRAP_ACK        3            \-
     \                                 SYSMSG_OP_TTRACE_PC            4            \-
     ====================== ========== ============================== ============ ==========
 

diff --git a/llvm/docs/AMDGPU/gfx9_opt_0d447d.rst b/llvm/docs/AMDGPU/gfx9_opt_0d447d.rst
new file mode 100644 (file)
index 0000000..7a1d67f
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx9_opt_0d447d.rst
@@ -0,0 +1,13 @@
+..
+    **************************************************
+    *                                                *
+    *   Automatically generated file, do not edit!   *
+    *                                                *
+    **************************************************
+
+.. _amdgpu_synid_gfx9_opt_0d447d:
+
+opt
+===
+
+This is an optional operand. It must be used if and only if :ref:`lds<amdgpu_synid_lds>` is omitted.

diff --git a/llvm/docs/AMDGPU/gfx9_opt.rst b/llvm/docs/AMDGPU/gfx9_opt_847aed.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx9_opt.rst
rename to llvm/docs/AMDGPU/gfx9_opt_847aed.rst
index 913bb51..d25a64c 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_opt.rst
+++ b/llvm/docs/AMDGPU/gfx9_opt_847aed.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_opt:
+.. _amdgpu_synid_gfx9_opt_847aed:
 
 opt
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_saddr_1.rst b/llvm/docs/AMDGPU/gfx9_saddr_6060e5.rst
similarity index 81%
rename from llvm/docs/AMDGPU/gfx9_saddr_1.rst
rename to llvm/docs/AMDGPU/gfx9_saddr_6060e5.rst
index b2a9277..89330d2 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_saddr_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_saddr_6060e5.rst
@@ -5,14 +5,14 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_saddr_1:
+.. _amdgpu_synid_gfx9_saddr_6060e5:
 
 saddr
 =====
 
 An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
 
-Either this operand or :ref:`vaddr<amdgpu_synid_gfx9_vaddr_3>` must be set to :ref:`off<amdgpu_synid_off>`.
+Either this operand or :ref:`vaddr<amdgpu_synid_gfx9_vaddr_76b997>` must be set to :ref:`off<amdgpu_synid_off>`.
 
 *Size:* 1 dword.
 

diff --git a/llvm/docs/AMDGPU/gfx9_saddr.rst b/llvm/docs/AMDGPU/gfx9_saddr_a37373.rst
similarity index 82%
rename from llvm/docs/AMDGPU/gfx9_saddr.rst
rename to llvm/docs/AMDGPU/gfx9_saddr_a37373.rst
index 442f523..bdb62e0 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_saddr.rst
+++ b/llvm/docs/AMDGPU/gfx9_saddr_a37373.rst
@@ -5,14 +5,14 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_saddr:
+.. _amdgpu_synid_gfx9_saddr_a37373:
 
 saddr
 =====
 
 An optional 64-bit flat global address. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
 
-See :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` for description of available addressing modes.
+See :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>` for description of available addressing modes.
 
 *Size:* 2 dwords.
 

diff --git a/llvm/docs/AMDGPU/gfx9_sbase_1.rst b/llvm/docs/AMDGPU/gfx9_sbase_010ce0.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_sbase_1.rst
rename to llvm/docs/AMDGPU/gfx9_sbase_010ce0.rst
index 7ddb734..a6a57a4 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sbase_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_sbase_010ce0.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sbase_1:
+.. _amdgpu_synid_gfx9_sbase_010ce0:
 
 sbase
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_sbase.rst b/llvm/docs/AMDGPU/gfx9_sbase_044055.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_sbase.rst
rename to llvm/docs/AMDGPU/gfx9_sbase_044055.rst
index 9ab35cf..5aa7289 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sbase.rst
+++ b/llvm/docs/AMDGPU/gfx9_sbase_044055.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sbase:
+.. _amdgpu_synid_gfx9_sbase_044055:
 
 sbase
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_sbase_2.rst b/llvm/docs/AMDGPU/gfx9_sbase_0cd545.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx9_sbase_2.rst
rename to llvm/docs/AMDGPU/gfx9_sbase_0cd545.rst
index 69a9c77..e2fdecc 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sbase_2.rst
+++ b/llvm/docs/AMDGPU/gfx9_sbase_0cd545.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sbase_2:
+.. _amdgpu_synid_gfx9_sbase_0cd545:
 
 sbase
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_sdata_3.rst b/llvm/docs/AMDGPU/gfx9_sdata_595c25.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_sdata_3.rst
rename to llvm/docs/AMDGPU/gfx9_sdata_595c25.rst
index 7f4bd43..93c674b 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdata_3.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdata_595c25.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdata_3:
+.. _amdgpu_synid_gfx9_sdata_595c25:
 
 sdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_sdata_5.rst b/llvm/docs/AMDGPU/gfx9_sdata_7cbd60.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_sdata_5.rst
rename to llvm/docs/AMDGPU/gfx9_sdata_7cbd60.rst
index 57b13d2..6349270 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdata_5.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdata_7cbd60.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdata_5:
+.. _amdgpu_synid_gfx9_sdata_7cbd60:
 
 sdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_sdata.rst b/llvm/docs/AMDGPU/gfx9_sdata_aefe00.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx9_sdata.rst
rename to llvm/docs/AMDGPU/gfx9_sdata_aefe00.rst
index b76aea2..2cff191 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdata.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdata_aefe00.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdata:
+.. _amdgpu_synid_gfx9_sdata_aefe00:
 
 sdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_sdata_2.rst b/llvm/docs/AMDGPU/gfx9_sdata_c6aec1.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_sdata_2.rst
rename to llvm/docs/AMDGPU/gfx9_sdata_c6aec1.rst
index af0f92e..7ba1621 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdata_2.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdata_c6aec1.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdata_2:
+.. _amdgpu_synid_gfx9_sdata_c6aec1:
 
 sdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_sdata_4.rst b/llvm/docs/AMDGPU/gfx9_sdata_e9f591.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_sdata_4.rst
rename to llvm/docs/AMDGPU/gfx9_sdata_e9f591.rst
index e63b71b..737e979 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdata_4.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdata_e9f591.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdata_4:
+.. _amdgpu_synid_gfx9_sdata_e9f591:
 
 sdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_sdata_1.rst b/llvm/docs/AMDGPU/gfx9_sdata_eb6f2a.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx9_sdata_1.rst
rename to llvm/docs/AMDGPU/gfx9_sdata_eb6f2a.rst
index eff06ae..7f08672 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdata_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdata_eb6f2a.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdata_1:
+.. _amdgpu_synid_gfx9_sdata_eb6f2a:
 
 sdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_sdst_5.rst b/llvm/docs/AMDGPU/gfx9_sdst_06b266.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx9_sdst_5.rst
rename to llvm/docs/AMDGPU/gfx9_sdst_06b266.rst
index 7987c7f..daaf841 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdst_5.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdst_06b266.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdst_5:
+.. _amdgpu_synid_gfx9_sdst_06b266:
 
 sdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_sdst_3.rst b/llvm/docs/AMDGPU/gfx9_sdst_0804b1.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_sdst_3.rst
rename to llvm/docs/AMDGPU/gfx9_sdst_0804b1.rst
index fc53889..ecc0d18 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdst_3.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdst_0804b1.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdst_3:
+.. _amdgpu_synid_gfx9_sdst_0804b1:
 
 sdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_sdst_4.rst b/llvm/docs/AMDGPU/gfx9_sdst_362c37.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_sdst_4.rst
rename to llvm/docs/AMDGPU/gfx9_sdst_362c37.rst
index 9f5c4ee..b964be6 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdst_4.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdst_362c37.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdst_4:
+.. _amdgpu_synid_gfx9_sdst_362c37:
 
 sdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_sdst_1.rst b/llvm/docs/AMDGPU/gfx9_sdst_3bc700.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_sdst_1.rst
rename to llvm/docs/AMDGPU/gfx9_sdst_3bc700.rst
index 3687964..b1ebbcc 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdst_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdst_3bc700.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdst_1:
+.. _amdgpu_synid_gfx9_sdst_3bc700:
 
 sdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_sdst_7.rst b/llvm/docs/AMDGPU/gfx9_sdst_59204c.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_sdst_7.rst
rename to llvm/docs/AMDGPU/gfx9_sdst_59204c.rst
index 425a331..ab9f48f 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdst_7.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdst_59204c.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdst_7:
+.. _amdgpu_synid_gfx9_sdst_59204c:
 
 sdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_sdst_2.rst b/llvm/docs/AMDGPU/gfx9_sdst_718cc4.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_sdst_2.rst
rename to llvm/docs/AMDGPU/gfx9_sdst_718cc4.rst
index 3f2e027..90827b6 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdst_2.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdst_718cc4.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdst_2:
+.. _amdgpu_synid_gfx9_sdst_718cc4:
 
 sdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_sdst.rst b/llvm/docs/AMDGPU/gfx9_sdst_94342d.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_sdst.rst
rename to llvm/docs/AMDGPU/gfx9_sdst_94342d.rst
index c6d93c7..e1f5abd 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdst.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdst_94342d.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdst:
+.. _amdgpu_synid_gfx9_sdst_94342d:
 
 sdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_sdst_6.rst b/llvm/docs/AMDGPU/gfx9_sdst_a319e6.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx9_sdst_6.rst
rename to llvm/docs/AMDGPU/gfx9_sdst_a319e6.rst
index 80bbd65..89bcd14 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_sdst_6.rst
+++ b/llvm/docs/AMDGPU/gfx9_sdst_a319e6.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_sdst_6:
+.. _amdgpu_synid_gfx9_sdst_a319e6:
 
 sdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_simm32_2.rst b/llvm/docs/AMDGPU/gfx9_simm32_6f0844.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_simm32_2.rst
rename to llvm/docs/AMDGPU/gfx9_simm32_6f0844.rst
index 8698c8a..d62755e 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_simm32_2.rst
+++ b/llvm/docs/AMDGPU/gfx9_simm32_6f0844.rst
@@ -5,10 +5,10 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_simm32_2:
+.. _amdgpu_synid_gfx9_simm32_6f0844:
 
 simm32
 ======
 
 A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
-The value is converted to *f32* as described :ref:`here<amdgpu_synid_fp_conv>`.
+The value is converted to *f32* as described :ref:`here<amdgpu_synid_conv>`.

diff --git a/llvm/docs/AMDGPU/gfx9_simm32.rst b/llvm/docs/AMDGPU/gfx9_simm32_a3e80c.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx9_simm32.rst
rename to llvm/docs/AMDGPU/gfx9_simm32_a3e80c.rst
index 7e85213..6c09fad 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_simm32.rst
+++ b/llvm/docs/AMDGPU/gfx9_simm32_a3e80c.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_simm32:
+.. _amdgpu_synid_gfx9_simm32_a3e80c:
 
 simm32
 ======

diff --git a/llvm/docs/AMDGPU/gfx9_simm32_1.rst b/llvm/docs/AMDGPU/gfx9_simm32_be0c1c.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_simm32_1.rst
rename to llvm/docs/AMDGPU/gfx9_simm32_be0c1c.rst
index 00d0de1..5fd1f65 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_simm32_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_simm32_be0c1c.rst
@@ -5,10 +5,10 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_simm32_1:
+.. _amdgpu_synid_gfx9_simm32_be0c1c:
 
 simm32
 ======
 
 A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
-The value is converted to *f16* as described :ref:`here<amdgpu_synid_fp_conv>`.
+The value is converted to *f16* as described :ref:`here<amdgpu_synid_conv>`.

diff --git a/llvm/docs/AMDGPU/gfx9_soffset.rst b/llvm/docs/AMDGPU/gfx9_soffset_4318ca.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_soffset.rst
rename to llvm/docs/AMDGPU/gfx9_soffset_4318ca.rst
index 9b55558..c17b9d8 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_soffset.rst
+++ b/llvm/docs/AMDGPU/gfx9_soffset_4318ca.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_soffset:
+.. _amdgpu_synid_gfx9_soffset_4318ca:
 
 soffset
 =======

diff --git a/llvm/docs/AMDGPU/gfx9_soffset_1.rst b/llvm/docs/AMDGPU/gfx9_soffset_8a17c8.rst
similarity index 74%
rename from llvm/docs/AMDGPU/gfx9_soffset_1.rst
rename to llvm/docs/AMDGPU/gfx9_soffset_8a17c8.rst
index ecac060..3df50ce 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_soffset_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_soffset_8a17c8.rst
@@ -5,16 +5,18 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_soffset_1:
+.. _amdgpu_synid_gfx9_soffset_8a17c8:
 
 soffset
 =======
 
-An offset added to the base address to get memory address.
+An offset from the base address.
 
 * If offset is specified as a register, it supplies an unsigned byte offset.
 * If offset is specified as a 21-bit immediate, it supplies a signed byte offset.
 
+Note that an *immediate* offset may be specified using either :ref:`simm21<amdgpu_synid_simm21>` operand or :ref:`offset21s<amdgpu_synid_smem_offset21s>` modifier, but not both.
+
 *Size:* 1 dword.
 
 *Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`simm21<amdgpu_synid_simm21>`

diff --git a/llvm/docs/AMDGPU/gfx9_soffset_2.rst b/llvm/docs/AMDGPU/gfx9_soffset_ba92ce.rst
similarity index 64%
rename from llvm/docs/AMDGPU/gfx9_soffset_2.rst
rename to llvm/docs/AMDGPU/gfx9_soffset_ba92ce.rst
index 8faf02d..a236ed8 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_soffset_2.rst
+++ b/llvm/docs/AMDGPU/gfx9_soffset_ba92ce.rst
@@ -5,12 +5,14 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_soffset_2:
+.. _amdgpu_synid_gfx9_soffset_ba92ce:
 
 soffset
 =======
 
-An unsigned 20-bit offset added to the base address to get memory address.
+An unsigned offset from the base address. My be specified as either a register or a 20-bit immediate.
+
+Note that an *immediate* offset may be specified using either :ref:`uimm20<amdgpu_synid_uimm20>` operand or :ref:`offset20u<amdgpu_synid_smem_offset20u>` modifier, but not both.
 
 *Size:* 1 dword.
 

diff --git a/llvm/docs/AMDGPU/gfx9_src_3.rst b/llvm/docs/AMDGPU/gfx9_src_089570.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx9_src_3.rst
rename to llvm/docs/AMDGPU/gfx9_src_089570.rst
index 7f2de41..827f80e 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_src_3.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_089570.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_src_3:
+.. _amdgpu_synid_gfx9_src_089570:
 
 src
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_src_6.rst b/llvm/docs/AMDGPU/gfx9_src_4de5c6.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_src_6.rst
rename to llvm/docs/AMDGPU/gfx9_src_4de5c6.rst
index ebae6c0..4ef5250 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_src_6.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_4de5c6.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_src_6:
+.. _amdgpu_synid_gfx9_src_4de5c6:
 
 src
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_src_8.rst b/llvm/docs/AMDGPU/gfx9_src_4e78e6.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_src_8.rst
rename to llvm/docs/AMDGPU/gfx9_src_4e78e6.rst
index f610fc2..b5f0561 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_src_8.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_4e78e6.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_src_8:
+.. _amdgpu_synid_gfx9_src_4e78e6:
 
 src
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_src_5.rst b/llvm/docs/AMDGPU/gfx9_src_516946.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx9_src_5.rst
rename to llvm/docs/AMDGPU/gfx9_src_516946.rst
index acbac62..fef1400 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_src_5.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_516946.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_src_5:
+.. _amdgpu_synid_gfx9_src_516946:
 
 src
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_src_2.rst b/llvm/docs/AMDGPU/gfx9_src_56ed80.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_src_2.rst
rename to llvm/docs/AMDGPU/gfx9_src_56ed80.rst
index a2a0b35..9e94853 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_src_2.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_56ed80.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_src_2:
+.. _amdgpu_synid_gfx9_src_56ed80:
 
 src
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_src.rst b/llvm/docs/AMDGPU/gfx9_src_73ab34.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx9_src.rst
rename to llvm/docs/AMDGPU/gfx9_src_73ab34.rst
index f0fe232..da7ae27 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_src.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_73ab34.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_src:
+.. _amdgpu_synid_gfx9_src_73ab34:
 
 src
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_src_10.rst b/llvm/docs/AMDGPU/gfx9_src_955b45.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_src_10.rst
rename to llvm/docs/AMDGPU/gfx9_src_955b45.rst
index 9c46c01..1bbabae 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_src_10.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_955b45.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_src_10:
+.. _amdgpu_synid_gfx9_src_955b45:
 
 src
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_src_1.rst b/llvm/docs/AMDGPU/gfx9_src_d578c4.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_src_1.rst
rename to llvm/docs/AMDGPU/gfx9_src_d578c4.rst
index ac4dea9..56c86f5 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_src_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_d578c4.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_src_1:
+.. _amdgpu_synid_gfx9_src_d578c4:
 
 src
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_src_4.rst b/llvm/docs/AMDGPU/gfx9_src_d95796.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_src_4.rst
rename to llvm/docs/AMDGPU/gfx9_src_d95796.rst
index d9c9442..264a976 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_src_4.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_d95796.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_src_4:
+.. _amdgpu_synid_gfx9_src_d95796:
 
 src
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_src_7.rst b/llvm/docs/AMDGPU/gfx9_src_e1561c.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_src_7.rst
rename to llvm/docs/AMDGPU/gfx9_src_e1561c.rst
index 2b736f8..8af74c8 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_src_7.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_e1561c.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_src_7:
+.. _amdgpu_synid_gfx9_src_e1561c:
 
 src
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_src_9.rst b/llvm/docs/AMDGPU/gfx9_src_f73668.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_src_9.rst
rename to llvm/docs/AMDGPU/gfx9_src_f73668.rst
index 83cb0b4..6936360 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_src_9.rst
+++ b/llvm/docs/AMDGPU/gfx9_src_f73668.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_src_9:
+.. _amdgpu_synid_gfx9_src_f73668:
 
 src
 ===

diff --git a/llvm/docs/AMDGPU/gfx9_srsrc.rst b/llvm/docs/AMDGPU/gfx9_srsrc_79ffcd.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_srsrc.rst
rename to llvm/docs/AMDGPU/gfx9_srsrc_79ffcd.rst
index 5916602..c637cab 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_srsrc.rst
+++ b/llvm/docs/AMDGPU/gfx9_srsrc_79ffcd.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_srsrc:
+.. _amdgpu_synid_gfx9_srsrc_79ffcd:
 
 srsrc
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_srsrc_1.rst b/llvm/docs/AMDGPU/gfx9_srsrc_e73d16.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx9_srsrc_1.rst
rename to llvm/docs/AMDGPU/gfx9_srsrc_e73d16.rst
index 4cbcb1f..2c4e913 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_srsrc_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_srsrc_e73d16.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_srsrc_1:
+.. _amdgpu_synid_gfx9_srsrc_e73d16:
 
 srsrc
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_ssrc_8.rst b/llvm/docs/AMDGPU/gfx9_ssrc_4db4a9.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_ssrc_8.rst
rename to llvm/docs/AMDGPU/gfx9_ssrc_4db4a9.rst
index 8457952..46b529c 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_ssrc_8.rst
+++ b/llvm/docs/AMDGPU/gfx9_ssrc_4db4a9.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_ssrc_8:
+.. _amdgpu_synid_gfx9_ssrc_4db4a9:
 
 ssrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_ssrc_7.rst b/llvm/docs/AMDGPU/gfx9_ssrc_57838b.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx9_ssrc_7.rst
rename to llvm/docs/AMDGPU/gfx9_ssrc_57838b.rst
index ed05b75..1ec0133 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_ssrc_7.rst
+++ b/llvm/docs/AMDGPU/gfx9_ssrc_57838b.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_ssrc_7:
+.. _amdgpu_synid_gfx9_ssrc_57838b:
 
 ssrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_ssrc_2.rst b/llvm/docs/AMDGPU/gfx9_ssrc_595c25.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_ssrc_2.rst
rename to llvm/docs/AMDGPU/gfx9_ssrc_595c25.rst
index 60a15bb..dc41fd9 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_ssrc_2.rst
+++ b/llvm/docs/AMDGPU/gfx9_ssrc_595c25.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_ssrc_2:
+.. _amdgpu_synid_gfx9_ssrc_595c25:
 
 ssrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_ssrc_5.rst b/llvm/docs/AMDGPU/gfx9_ssrc_65f041.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx9_ssrc_5.rst
rename to llvm/docs/AMDGPU/gfx9_ssrc_65f041.rst
index bd0dcfd..7361283 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_ssrc_5.rst
+++ b/llvm/docs/AMDGPU/gfx9_ssrc_65f041.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_ssrc_5:
+.. _amdgpu_synid_gfx9_ssrc_65f041:
 
 ssrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_ssrc_1.rst b/llvm/docs/AMDGPU/gfx9_ssrc_aee59c.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_ssrc_1.rst
rename to llvm/docs/AMDGPU/gfx9_ssrc_aee59c.rst
index 6fd4eaf..853b817 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_ssrc_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_ssrc_aee59c.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_ssrc_1:
+.. _amdgpu_synid_gfx9_ssrc_aee59c:
 
 ssrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_ssrc_4.rst b/llvm/docs/AMDGPU/gfx9_ssrc_c31902.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_ssrc_4.rst
rename to llvm/docs/AMDGPU/gfx9_ssrc_c31902.rst
index a5a60d3..ca6801b 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_ssrc_4.rst
+++ b/llvm/docs/AMDGPU/gfx9_ssrc_c31902.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_ssrc_4:
+.. _amdgpu_synid_gfx9_ssrc_c31902:
 
 ssrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_ssrc.rst b/llvm/docs/AMDGPU/gfx9_ssrc_c5d631.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_ssrc.rst
rename to llvm/docs/AMDGPU/gfx9_ssrc_c5d631.rst
index 59f44c6..4d4408b 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_ssrc.rst
+++ b/llvm/docs/AMDGPU/gfx9_ssrc_c5d631.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_ssrc:
+.. _amdgpu_synid_gfx9_ssrc_c5d631:
 
 ssrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_ssrc_6.rst b/llvm/docs/AMDGPU/gfx9_ssrc_c8a322.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx9_ssrc_6.rst
rename to llvm/docs/AMDGPU/gfx9_ssrc_c8a322.rst
index 02faee4..26284e7 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_ssrc_6.rst
+++ b/llvm/docs/AMDGPU/gfx9_ssrc_c8a322.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_ssrc_6:
+.. _amdgpu_synid_gfx9_ssrc_c8a322:
 
 ssrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_ssrc_3.rst b/llvm/docs/AMDGPU/gfx9_ssrc_e9f591.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_ssrc_3.rst
rename to llvm/docs/AMDGPU/gfx9_ssrc_e9f591.rst
index 98b0020..1a92e83 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_ssrc_3.rst
+++ b/llvm/docs/AMDGPU/gfx9_ssrc_e9f591.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_ssrc_3:
+.. _amdgpu_synid_gfx9_ssrc_e9f591:
 
 ssrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_tgt.rst b/llvm/docs/AMDGPU/gfx9_tgt.rst
index bb8e986..3b8fb78 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_tgt.rst
+++ b/llvm/docs/AMDGPU/gfx9_tgt.rst
@@ -12,12 +12,12 @@ tgt
 
 An export target:
 
-    ============== ===================================
-    Syntax         Description
-    ============== ===================================
-    pos{0..3}      Copy vertex position 0..3.
-    param{0..31}   Copy vertex parameter 0..31.
-    mrt{0..7}      Copy pixel color to the MRTs 0..7.
-    mrtz           Copy pixel depth (Z) data.
-    null           Copy nothing.
-    ============== ===================================
+    ================== ===================================
+    Syntax             Description
+    ================== ===================================
+    pos{0..3}          Copy vertex position 0..3.
+    param{0..31}       Copy vertex parameter 0..31.
+    mrt{0..7}          Copy pixel color to the MRTs 0..7.
+    mrtz               Copy pixel depth (Z) data.
+    null               Copy nothing.
+    ================== ===================================

diff --git a/llvm/docs/AMDGPU/gfx9_vaddr_0212e3.rst b/llvm/docs/AMDGPU/gfx9_vaddr_0212e3.rst
new file mode 100644 (file)
index 0000000..97ab948
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx9_vaddr_0212e3.rst
@@ -0,0 +1,20 @@
+..
+    **************************************************
+    *                                                *
+    *   Automatically generated file, do not edit!   *
+    *                                                *
+    **************************************************
+
+.. _amdgpu_synid_gfx9_vaddr_0212e3:
+
+vaddr
+=====
+
+A 64-bit flat global address or a 32-bit offset depending on addressing mode:
+
+* Address = :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>` set to :ref:`off<amdgpu_synid_off>`.
+* Address = :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>` + :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid_gfx9_saddr_a37373>` is not :ref:`off<amdgpu_synid_off>`.
+
+*Size:* 1 or 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vaddr_2.rst b/llvm/docs/AMDGPU/gfx9_vaddr_2.rst
deleted file mode 100644 (file)
index 0ee1edd..0000000
--- a/llvm/docs/AMDGPU/gfx9_vaddr_2.rst
+++ /dev/null
@@ -1,20 +0,0 @@
-..
-    **************************************************
-    *                                                *
-    *   Automatically generated file, do not edit!   *
-    *                                                *
-    **************************************************
-
-.. _amdgpu_synid_gfx9_vaddr_2:
-
-vaddr
-=====
-
-A 64-bit flat global address or a 32-bit offset depending on addressing mode:
-
-* Address = :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid_gfx9_saddr>` set to :ref:`off<amdgpu_synid_off>`.
-* Address = :ref:`saddr<amdgpu_synid_gfx9_saddr>` + :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx9_vaddr_2>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid_gfx9_saddr>` is not :ref:`off<amdgpu_synid_off>`.
-
-*Size:* 1 or 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vaddr_4.rst b/llvm/docs/AMDGPU/gfx9_vaddr_5d0b42.rst
similarity index 67%
rename from llvm/docs/AMDGPU/gfx9_vaddr_4.rst
rename to llvm/docs/AMDGPU/gfx9_vaddr_5d0b42.rst
index ccee5f4..a485c41 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vaddr_4.rst
+++ b/llvm/docs/AMDGPU/gfx9_vaddr_5d0b42.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vaddr_4:
+.. _amdgpu_synid_gfx9_vaddr_5d0b42:
 
 vaddr
 =====
@@ -14,8 +14,8 @@ Image address which includes from one to four dimensional coordinates and other
 
 *Size:* 1, 2, 3, 4, 8 or 16 dwords. Actual size depends on opcode, specific image being handled and :ref:`a16<amdgpu_synid_a16>`.
 
-  Note 1. Image format and dimensions are encoded in the image resource constant but not in the instruction.
+    Note 1. Image format and dimensions are encoded in the image resource constant but not in the instruction.
 
-  Note 2. Actually image address size may vary from 1 to 13 dwords, but assembler currently supports a limited range of register sequences.
+    Note 2. Actually image address size may vary from 1 to 13 dwords, but assembler currently supports a limited range of register sequences.
 
 *Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vaddr_3.rst b/llvm/docs/AMDGPU/gfx9_vaddr_76b997.rst
similarity index 76%
rename from llvm/docs/AMDGPU/gfx9_vaddr_3.rst
rename to llvm/docs/AMDGPU/gfx9_vaddr_76b997.rst
index f332cb6..a1a350e 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vaddr_3.rst
+++ b/llvm/docs/AMDGPU/gfx9_vaddr_76b997.rst
@@ -5,14 +5,14 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vaddr_3:
+.. _amdgpu_synid_gfx9_vaddr_76b997:
 
 vaddr
 =====
 
 An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
 
-Either this operand or :ref:`saddr<amdgpu_synid_gfx9_saddr_1>` must be set to :ref:`off<amdgpu_synid_off>`.
+Either this operand or :ref:`saddr<amdgpu_synid_gfx9_saddr_6060e5>` must be set to :ref:`off<amdgpu_synid_off>`.
 
 *Size:* 1 dword.
 

diff --git a/llvm/docs/AMDGPU/gfx9_vaddr_1.rst b/llvm/docs/AMDGPU/gfx9_vaddr_9f7133.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vaddr_1.rst
rename to llvm/docs/AMDGPU/gfx9_vaddr_9f7133.rst
index aabf565..4d3e9e3 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vaddr_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_vaddr_9f7133.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vaddr_1:
+.. _amdgpu_synid_gfx9_vaddr_9f7133:
 
 vaddr
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_vaddr_5.rst b/llvm/docs/AMDGPU/gfx9_vaddr_b73dc0.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx9_vaddr_5.rst
rename to llvm/docs/AMDGPU/gfx9_vaddr_b73dc0.rst
index 0c2b159..0b476e9 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vaddr_5.rst
+++ b/llvm/docs/AMDGPU/gfx9_vaddr_b73dc0.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vaddr_5:
+.. _amdgpu_synid_gfx9_vaddr_b73dc0:
 
 vaddr
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_vaddr.rst b/llvm/docs/AMDGPU/gfx9_vaddr_f20ee4.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vaddr.rst
rename to llvm/docs/AMDGPU/gfx9_vaddr_f20ee4.rst
index 194b268..c95d076 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vaddr.rst
+++ b/llvm/docs/AMDGPU/gfx9_vaddr_f20ee4.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vaddr:
+.. _amdgpu_synid_gfx9_vaddr_f20ee4:
 
 vaddr
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_vdata0.rst b/llvm/docs/AMDGPU/gfx9_vdata0_6802ce.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx9_vdata0.rst
rename to llvm/docs/AMDGPU/gfx9_vdata0_6802ce.rst
index 4df069f..eafb446 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata0.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata0_6802ce.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata0:
+.. _amdgpu_synid_gfx9_vdata0_6802ce:
 
 vdata0
 ======

diff --git a/llvm/docs/AMDGPU/gfx9_vdata0_1.rst b/llvm/docs/AMDGPU/gfx9_vdata0_fd235e.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx9_vdata0_1.rst
rename to llvm/docs/AMDGPU/gfx9_vdata0_fd235e.rst
index 00595e2..475f765 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata0_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata0_fd235e.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata0_1:
+.. _amdgpu_synid_gfx9_vdata0_fd235e:
 
 vdata0
 ======

diff --git a/llvm/docs/AMDGPU/gfx9_vdata1.rst b/llvm/docs/AMDGPU/gfx9_vdata1_6802ce.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx9_vdata1.rst
rename to llvm/docs/AMDGPU/gfx9_vdata1_6802ce.rst
index 07e21e3..80c88d6 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata1.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata1_6802ce.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata1:
+.. _amdgpu_synid_gfx9_vdata1_6802ce:
 
 vdata1
 ======

diff --git a/llvm/docs/AMDGPU/gfx9_vdata1_1.rst b/llvm/docs/AMDGPU/gfx9_vdata1_fd235e.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx9_vdata1_1.rst
rename to llvm/docs/AMDGPU/gfx9_vdata1_fd235e.rst
index a5083fb..4be66aa 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata1_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata1_fd235e.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata1_1:
+.. _amdgpu_synid_gfx9_vdata1_fd235e:
 
 vdata1
 ======

diff --git a/llvm/docs/AMDGPU/gfx9_vdata_8.rst b/llvm/docs/AMDGPU/gfx9_vdata_0aba12.rst
similarity index 81%
rename from llvm/docs/AMDGPU/gfx9_vdata_8.rst
rename to llvm/docs/AMDGPU/gfx9_vdata_0aba12.rst
index df9d32e..6a5d26c 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata_8.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata_0aba12.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata_8:
+.. _amdgpu_synid_gfx9_vdata_0aba12:
 
 vdata
 =====
@@ -16,6 +16,6 @@ Optionally may serve as an output data:
 
 * If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
 
-*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+*Size:* 1 dword.
 
 *Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vdata_6.rst b/llvm/docs/AMDGPU/gfx9_vdata_15d255.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_vdata_6.rst
rename to llvm/docs/AMDGPU/gfx9_vdata_15d255.rst
index fab039c..4865ba3 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata_6.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata_15d255.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata_6:
+.. _amdgpu_synid_gfx9_vdata_15d255:
 
 vdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_vdata_9.rst b/llvm/docs/AMDGPU/gfx9_vdata_16d321.rst
similarity index 81%
rename from llvm/docs/AMDGPU/gfx9_vdata_9.rst
rename to llvm/docs/AMDGPU/gfx9_vdata_16d321.rst
index caafea5..1da42f2 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata_9.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata_16d321.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata_9:
+.. _amdgpu_synid_gfx9_vdata_16d321:
 
 vdata
 =====
@@ -16,6 +16,6 @@ Optionally may serve as an output data:
 
 * If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
 
-*Size:* 2 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+*Size:* 2 dwords.
 
 *Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vdata_4.rst b/llvm/docs/AMDGPU/gfx9_vdata_35851e.rst
similarity index 81%
rename from llvm/docs/AMDGPU/gfx9_vdata_4.rst
rename to llvm/docs/AMDGPU/gfx9_vdata_35851e.rst
index 1d8eb16..b7662a2 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata_4.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata_35851e.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata_4:
+.. _amdgpu_synid_gfx9_vdata_35851e:
 
 vdata
 =====
@@ -16,10 +16,10 @@ Optionally may serve as an output data:
 
 * If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
 
-*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
+*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>`:
 
 * :ref:`dmask<amdgpu_synid_dmask>` may specify 1 data element for 32-bit-per-pixel surfaces or 2 data elements for 64-bit-per-pixel surfaces. Each data element occupies 1 dword.
-* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+
 
   Note: the surface data format is indicated in the image resource constant but not in the instruction.
 

diff --git a/llvm/docs/AMDGPU/gfx9_vdata_3.rst b/llvm/docs/AMDGPU/gfx9_vdata_56f215.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vdata_3.rst
rename to llvm/docs/AMDGPU/gfx9_vdata_56f215.rst
index a705537..46e6d28 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata_3.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata_56f215.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata_3:
+.. _amdgpu_synid_gfx9_vdata_56f215:
 
 vdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_vdata.rst b/llvm/docs/AMDGPU/gfx9_vdata_6802ce.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vdata.rst
rename to llvm/docs/AMDGPU/gfx9_vdata_6802ce.rst
index fa75401..3024ff1 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata_6802ce.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata:
+.. _amdgpu_synid_gfx9_vdata_6802ce:
 
 vdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_vdata_10.rst b/llvm/docs/AMDGPU/gfx9_vdata_890652.rst
similarity index 81%
rename from llvm/docs/AMDGPU/gfx9_vdata_10.rst
rename to llvm/docs/AMDGPU/gfx9_vdata_890652.rst
index 2d42087..56d0848 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata_10.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata_890652.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata_10:
+.. _amdgpu_synid_gfx9_vdata_890652:
 
 vdata
 =====
@@ -16,6 +16,6 @@ Optionally may serve as an output data:
 
 * If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
 
-*Size:* 4 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+*Size:* 4 dwords.
 
 *Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vdata_5.rst b/llvm/docs/AMDGPU/gfx9_vdata_a9ff5a.rst
similarity index 81%
rename from llvm/docs/AMDGPU/gfx9_vdata_5.rst
rename to llvm/docs/AMDGPU/gfx9_vdata_a9ff5a.rst
index 1a9ee65..f0df11c 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata_5.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata_a9ff5a.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata_5:
+.. _amdgpu_synid_gfx9_vdata_a9ff5a:
 
 vdata
 =====
@@ -16,10 +16,10 @@ Optionally may serve as an output data:
 
 * If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
 
-*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
+*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>`:
 
 * :ref:`dmask<amdgpu_synid_dmask>` may specify 2 data elements for 32-bit-per-pixel surfaces or 4 data elements for 64-bit-per-pixel surfaces. Each data element occupies 1 dword.
-* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+
 
   Note: the surface data format is indicated in the image resource constant but not in the instruction.
 

diff --git a/llvm/docs/AMDGPU/gfx9_vdata_7.rst b/llvm/docs/AMDGPU/gfx9_vdata_c08393.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_vdata_7.rst
rename to llvm/docs/AMDGPU/gfx9_vdata_c08393.rst
index df1dca5..687d65b 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata_7.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata_c08393.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata_7:
+.. _amdgpu_synid_gfx9_vdata_c08393:
 
 vdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_vdata_2.rst b/llvm/docs/AMDGPU/gfx9_vdata_e016a1.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vdata_2.rst
rename to llvm/docs/AMDGPU/gfx9_vdata_e016a1.rst
index 5cd172b..30085dd 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata_2.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata_e016a1.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata_2:
+.. _amdgpu_synid_gfx9_vdata_e016a1:
 
 vdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_vdata_1.rst b/llvm/docs/AMDGPU/gfx9_vdata_fd235e.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vdata_1.rst
rename to llvm/docs/AMDGPU/gfx9_vdata_fd235e.rst
index 585f816..3b13be4 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdata_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdata_fd235e.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdata_1:
+.. _amdgpu_synid_gfx9_vdata_fd235e:
 
 vdata
 =====

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_11.rst b/llvm/docs/AMDGPU/gfx9_vdst_11.rst
deleted file mode 100644 (file)
index f3512d3..0000000
--- a/llvm/docs/AMDGPU/gfx9_vdst_11.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
-    **************************************************
-    *                                                *
-    *   Automatically generated file, do not edit!   *
-    *                                                *
-    **************************************************
-
-.. _amdgpu_synid_gfx9_vdst_11:
-
-vdst
-====
-
-Instruction output: data read from a memory buffer.
-
-*Size:* 3 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_12.rst b/llvm/docs/AMDGPU/gfx9_vdst_12.rst
deleted file mode 100644 (file)
index 09d4d7a..0000000
--- a/llvm/docs/AMDGPU/gfx9_vdst_12.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
-    **************************************************
-    *                                                *
-    *   Automatically generated file, do not edit!   *
-    *                                                *
-    **************************************************
-
-.. _amdgpu_synid_gfx9_vdst_12:
-
-vdst
-====
-
-Instruction output: data read from a memory buffer.
-
-*Size:* 4 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_13.rst b/llvm/docs/AMDGPU/gfx9_vdst_13.rst
deleted file mode 100644 (file)
index ff27ff0..0000000
--- a/llvm/docs/AMDGPU/gfx9_vdst_13.rst
+++ /dev/null
@@ -1,21 +0,0 @@
-..
-    **************************************************
-    *                                                *
-    *   Automatically generated file, do not edit!   *
-    *                                                *
-    **************************************************
-
-.. _amdgpu_synid_gfx9_vdst_13:
-
-vdst
-====
-
-Instruction output: data read from a memory buffer.
-
-If :ref:`lds<amdgpu_synid_lds>` is specified, this operand is ignored by H/W and data are stored directly into LDS.
-
-*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
-
-    Note that :ref:`tfe<amdgpu_synid_tfe>` and :ref:`lds<amdgpu_synid_lds>` cannot be used together.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_6.rst b/llvm/docs/AMDGPU/gfx9_vdst_2ea017.rst
similarity index 77%
rename from llvm/docs/AMDGPU/gfx9_vdst_6.rst
rename to llvm/docs/AMDGPU/gfx9_vdst_2ea017.rst
index d82c898..3218d40 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdst_6.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdst_2ea017.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdst_6:
+.. _amdgpu_synid_gfx9_vdst_2ea017:
 
 vdst
 ====
@@ -14,9 +14,9 @@ Image data to load by an *image_gather4* instruction.
 
 *Size:* 4 data elements by default. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
 
-:ref:`d16<amdgpu_synid_d16>` and :ref:`tfe<amdgpu_synid_tfe>` affect operand size as follows:
+:ref:`d16<amdgpu_synid_d16>` affects operand size as follows:
 
 * :ref:`d16<amdgpu_synid_d16>` specifies that data elements in registers are packed; each value occupies 16 bits.
-* :ref:`tfe<amdgpu_synid_tfe>` adds one dword if specified.
+
 
 *Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_10.rst b/llvm/docs/AMDGPU/gfx9_vdst_322561.rst
similarity index 71%
rename from llvm/docs/AMDGPU/gfx9_vdst_10.rst
rename to llvm/docs/AMDGPU/gfx9_vdst_322561.rst
index 8e7b990..4cce8f3 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdst_10.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdst_322561.rst
@@ -5,13 +5,15 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdst_10:
+.. _amdgpu_synid_gfx9_vdst_322561:
 
 vdst
 ====
 
 Instruction output: data read from a memory buffer.
 
-*Size:* 2 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+This is an optional operand. It must be used if and only if :ref:`lds<amdgpu_synid_lds>` is omitted.
+
+*Size:* 1 dword.
 
 *Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_7.rst b/llvm/docs/AMDGPU/gfx9_vdst_3d7dcf.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx9_vdst_7.rst
rename to llvm/docs/AMDGPU/gfx9_vdst_3d7dcf.rst
index 6c4860c..898ab4b 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdst_7.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdst_3d7dcf.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdst_7:
+.. _amdgpu_synid_gfx9_vdst_3d7dcf:
 
 vdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_5.rst b/llvm/docs/AMDGPU/gfx9_vdst_463513.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_vdst_5.rst
rename to llvm/docs/AMDGPU/gfx9_vdst_463513.rst
index faf7f8d..dbf6761 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdst_5.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdst_463513.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdst_5:
+.. _amdgpu_synid_gfx9_vdst_463513:
 
 vdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_8.rst b/llvm/docs/AMDGPU/gfx9_vdst_473a69.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx9_vdst_8.rst
rename to llvm/docs/AMDGPU/gfx9_vdst_473a69.rst
index 4a507b1..b1870ce 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdst_8.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdst_473a69.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdst_8:
+.. _amdgpu_synid_gfx9_vdst_473a69:
 
 vdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_3.rst b/llvm/docs/AMDGPU/gfx9_vdst_48e42f.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vdst_3.rst
rename to llvm/docs/AMDGPU/gfx9_vdst_48e42f.rst
index cfc1291..00908b0 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdst_3.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdst_48e42f.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdst_3:
+.. _amdgpu_synid_gfx9_vdst_48e42f:
 
 vdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_2.rst b/llvm/docs/AMDGPU/gfx9_vdst_69a144.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vdst_2.rst
rename to llvm/docs/AMDGPU/gfx9_vdst_69a144.rst
index 11c1fdb..484821f 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdst_2.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdst_69a144.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdst_2:
+.. _amdgpu_synid_gfx9_vdst_69a144:
 
 vdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_709347.rst b/llvm/docs/AMDGPU/gfx9_vdst_709347.rst
new file mode 100644 (file)
index 0000000..534755d
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx9_vdst_709347.rst
@@ -0,0 +1,17 @@
+..
+    **************************************************
+    *                                                *
+    *   Automatically generated file, do not edit!   *
+    *                                                *
+    **************************************************
+
+.. _amdgpu_synid_gfx9_vdst_709347:
+
+vdst
+====
+
+Instruction output: data read from a memory buffer.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_9.rst b/llvm/docs/AMDGPU/gfx9_vdst_81a6ed.rst
similarity index 77%
rename from llvm/docs/AMDGPU/gfx9_vdst_9.rst
rename to llvm/docs/AMDGPU/gfx9_vdst_81a6ed.rst
index dabefd2..4be2cca 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdst_9.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdst_81a6ed.rst
@@ -5,13 +5,13 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdst_9:
+.. _amdgpu_synid_gfx9_vdst_81a6ed:
 
 vdst
 ====
 
 Instruction output: data read from a memory buffer.
 
-*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+*Size:* 3 dwords.
 
 *Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vdst.rst b/llvm/docs/AMDGPU/gfx9_vdst_89680f.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vdst.rst
rename to llvm/docs/AMDGPU/gfx9_vdst_89680f.rst
index 1c003ac..7177708 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdst.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdst_89680f.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdst:
+.. _amdgpu_synid_gfx9_vdst_89680f:
 
 vdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_1.rst b/llvm/docs/AMDGPU/gfx9_vdst_bdb32f.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vdst_1.rst
rename to llvm/docs/AMDGPU/gfx9_vdst_bdb32f.rst
index 7e2f631..4e8e0dd 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdst_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdst_bdb32f.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdst_1:
+.. _amdgpu_synid_gfx9_vdst_bdb32f:
 
 vdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_4.rst b/llvm/docs/AMDGPU/gfx9_vdst_d0dc43.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx9_vdst_4.rst
rename to llvm/docs/AMDGPU/gfx9_vdst_d0dc43.rst
index b7d5ebe..1a02837 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vdst_4.rst
+++ b/llvm/docs/AMDGPU/gfx9_vdst_d0dc43.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vdst_4:
+.. _amdgpu_synid_gfx9_vdst_d0dc43:
 
 vdst
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_d71f1c.rst b/llvm/docs/AMDGPU/gfx9_vdst_d71f1c.rst
new file mode 100644 (file)
index 0000000..46081ae
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx9_vdst_d71f1c.rst
@@ -0,0 +1,17 @@
+..
+    **************************************************
+    *                                                *
+    *   Automatically generated file, do not edit!   *
+    *                                                *
+    **************************************************
+
+.. _amdgpu_synid_gfx9_vdst_d71f1c:
+
+vdst
+====
+
+Instruction output: data read from a memory buffer.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vdst_dd8a32.rst b/llvm/docs/AMDGPU/gfx9_vdst_dd8a32.rst
new file mode 100644 (file)
index 0000000..f5cecb5
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx9_vdst_dd8a32.rst
@@ -0,0 +1,17 @@
+..
+    **************************************************
+    *                                                *
+    *   Automatically generated file, do not edit!   *
+    *                                                *
+    **************************************************
+
+.. _amdgpu_synid_gfx9_vdst_dd8a32:
+
+vdst
+====
+
+Instruction output: data read from a memory buffer.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`

diff --git a/llvm/docs/AMDGPU/gfx9_vsrc.rst b/llvm/docs/AMDGPU/gfx9_vsrc_533a4e.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx9_vsrc.rst
rename to llvm/docs/AMDGPU/gfx9_vsrc_533a4e.rst
index efe436c..ae3c35d 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vsrc.rst
+++ b/llvm/docs/AMDGPU/gfx9_vsrc_533a4e.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vsrc:
+.. _amdgpu_synid_gfx9_vsrc_533a4e:
 
 vsrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_vsrc_1.rst b/llvm/docs/AMDGPU/gfx9_vsrc_6802ce.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vsrc_1.rst
rename to llvm/docs/AMDGPU/gfx9_vsrc_6802ce.rst
index 15035b4..d5e661d 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vsrc_1.rst
+++ b/llvm/docs/AMDGPU/gfx9_vsrc_6802ce.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vsrc_1:
+.. _amdgpu_synid_gfx9_vsrc_6802ce:
 
 vsrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_vsrc_2.rst b/llvm/docs/AMDGPU/gfx9_vsrc_e016a1.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vsrc_2.rst
rename to llvm/docs/AMDGPU/gfx9_vsrc_e016a1.rst
index 3eb9e5f..685daa2 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vsrc_2.rst
+++ b/llvm/docs/AMDGPU/gfx9_vsrc_e016a1.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vsrc_2:
+.. _amdgpu_synid_gfx9_vsrc_e016a1:
 
 vsrc
 ====

diff --git a/llvm/docs/AMDGPU/gfx9_vsrc_3.rst b/llvm/docs/AMDGPU/gfx9_vsrc_fd235e.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx9_vsrc_3.rst
rename to llvm/docs/AMDGPU/gfx9_vsrc_fd235e.rst
index 886257f..9d6d551 100644 (file)
--- a/llvm/docs/AMDGPU/gfx9_vsrc_3.rst
+++ b/llvm/docs/AMDGPU/gfx9_vsrc_fd235e.rst
@@ -5,7 +5,7 @@
     *                                                *
     **************************************************
 
-.. _amdgpu_synid_gfx9_vsrc_3:
+.. _amdgpu_synid_gfx9_vsrc_fd235e:
 
 vsrc
 ====

diff --git a/llvm/docs/AMDGPUModifierSyntax.rst b/llvm/docs/AMDGPUModifierSyntax.rst
index 97e2595..8a30bf1 100644 (file)
--- a/llvm/docs/AMDGPUModifierSyntax.rst
+++ b/llvm/docs/AMDGPUModifierSyntax.rst
@@ -1040,6 +1040,52 @@ dlc
 
 See a description :ref:`here<amdgpu_synid_dlc>`. GFX10 only.
 
+.. _amdgpu_synid_smem_offset20u:
+
+offset20u
+~~~~~~~~~
+
+Specifies an unsigned 20-bit offset, in bytes. The default value is 0.
+
+    ==================== ====================================================================
+    Syntax               Description
+    ==================== ====================================================================
+    offset:{0..0xFFFFF}  Specifies an offset as a positive
+                         :ref:`integer number <amdgpu_synid_integer_number>`
+                         or an :ref:`absolute expression<amdgpu_synid_absolute_expression>`.
+    ==================== ====================================================================
+
+Examples:
+
+.. parsed-literal::
+
+  offset:1
+  offset:0xfffff
+  offset:x-y
+
+.. _amdgpu_synid_smem_offset21s:
+
+offset21s
+~~~~~~~~~
+
+Specifies a signed 21-bit offset, in bytes. The default value is 0.
+
+    ============================= ====================================================================
+    Syntax                        Description
+    ============================= ====================================================================
+    offset:{-0x100000..0xFFFFF}   Specifies an offset as an
+                                  :ref:`integer number <amdgpu_synid_integer_number>`
+                                  or an :ref:`absolute expression<amdgpu_synid_absolute_expression>`.
+    ============================= ====================================================================
+
+Examples:
+
+.. parsed-literal::
+
+  offset:-1
+  offset:0xfffff
+  offset:-x
+
 VINTRP Modifiers
 ----------------