config SPI_CADENCE_QUADSPI
tristate "Cadence Quad SPI controller"
- depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST)
+ depends on OF && (ARM || ARM64 || X86 || RISCV || COMPILE_TEST)
help
Enable support for the Cadence Quad SPI Flash controller.
static int cqspi_probe(struct platform_device *pdev)
{
const struct cqspi_driver_platdata *ddata;
- struct reset_control *rstc, *rstc_ocp;
+ struct reset_control *rstc, *rstc_ocp, *rstc_ref;
struct device *dev = &pdev->dev;
struct spi_master *master;
struct resource *res_ahb;
goto probe_reset_failed;
}
+ if (of_device_is_compatible(pdev->dev.of_node, "starfive,jh7110-qspi")) {
+ rstc_ref = devm_reset_control_get_optional_exclusive(dev, "rstc_ref");
+ if (IS_ERR(rstc_ref)) {
+ ret = PTR_ERR(rstc_ref);
+ dev_err(dev, "Cannot get QSPI REF reset.\n");
+ goto probe_reset_failed;
+ }
+ reset_control_assert(rstc_ref);
+ reset_control_deassert(rstc_ref);
+ }
+
reset_control_assert(rstc);
reset_control_deassert(rstc);
.get_dma_status = cqspi_get_versal_dma_status,
};
+static const struct cqspi_driver_platdata jh7110_qspi = {
+ .quirks = CQSPI_DISABLE_DAC_MODE,
+};
+
static const struct of_device_id cqspi_dt_ids[] = {
{
.compatible = "cdns,qspi-nor",
.compatible = "intel,socfpga-qspi",
.data = &socfpga_qspi,
},
+ {
+ .compatible = "starfive,jh7110-qspi",
+ .data = &jh7110_qspi,
+ },
{ /* end of table */ }
};