clk: stm32mp1: merge 'clk-hsi-div' and 'ck_hsi' into one clock

This patch is to prepare STM32MP1 clocks in trusted mode.
This Merge will facilitate to have a more coherent clock tree
in no trusted / trusted world.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Link: https://lore.kernel.org/r/20210617051814.12018-2-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
index a875649..35d5aee 100644 (file)
--- a/drivers/clk/clk-stm32mp1.c
+++ b/drivers/clk/clk-stm32mp1.c
@@ -1657,16 +1657,16 @@ static const struct stm32_mux_cfg ker_mux_cfg[M_LAST] = {
 };
 
 static const struct clock_config stm32mp1_clock_cfg[] = {
-       /* Oscillator divider */
-       DIV(NO_ID, "clk-hsi-div", "clk-hsi", CLK_DIVIDER_POWER_OF_TWO,
-           RCC_HSICFGR, 0, 2, CLK_DIVIDER_READ_ONLY),
-
        /*  External / Internal Oscillators */
        GATE_MP1(CK_HSE, "ck_hse", "clk-hse", 0, RCC_OCENSETR, 8, 0),
        /* ck_csi is used by IO compensation and should be critical */
        GATE_MP1(CK_CSI, "ck_csi", "clk-csi", CLK_IS_CRITICAL,
                 RCC_OCENSETR, 4, 0),
-       GATE_MP1(CK_HSI, "ck_hsi", "clk-hsi-div", 0, RCC_OCENSETR, 0, 0),
+       COMPOSITE(CK_HSI, "ck_hsi", PARENT("clk-hsi"), 0,
+                 _GATE_MP1(RCC_OCENSETR, 0, 0),
+                 _NO_MUX,
+                 _DIV(RCC_HSICFGR, 0, 2, CLK_DIVIDER_POWER_OF_TWO |
+                      CLK_DIVIDER_READ_ONLY, NULL)),
        GATE(CK_LSI, "ck_lsi", "clk-lsi", 0, RCC_RDLSICR, 0, 0),
        GATE(CK_LSE, "ck_lse", "clk-lse", 0, RCC_BDCR, 0, 0),