kNumFormats,
"All formats must have a corresponding info entry.");
-static uint32_t g_num_format_infos = llvm::array_lengthof(g_format_infos);
+static uint32_t g_num_format_infos = std::size(g_format_infos);
static bool GetFormatFromFormatChar(char format_char, Format &format) {
for (uint32_t i = 0; i < g_num_format_infos; ++i) {
EV_SET(&in_events[i++], fd.first, EVFILT_READ, EV_ADD, 0, 0, 0);
num_events = kevent(loop.m_kqueue, in_events.data(), in_events.size(),
- out_events, llvm::array_lengthof(out_events), nullptr);
+ out_events, std::size(out_events), nullptr);
if (num_events < 0) {
if (errno == EINTR) {
? std::chrono::duration_cast<std::chrono::milliseconds>(*timeout)
.count()
: INFINITE;
- DWORD wait_result =
- ::WaitForMultipleObjects(llvm::array_lengthof(m_event_handles),
- m_event_handles, FALSE, milliseconds);
+ DWORD wait_result = ::WaitForMultipleObjects(
+ std::size(m_event_handles), m_event_handles, FALSE, milliseconds);
// All of the events are manual reset events, so make sure we reset them
// to non-signalled.
switch (wait_result) {
"breakpoint set --name '%1'"}};
// clang-format on
- size_t num_regexes = llvm::array_lengthof(break_regexes);
+ size_t num_regexes = std::size(break_regexes);
std::unique_ptr<CommandObjectRegexCommand> break_regex_cmd_up(
new CommandObjectRegexCommand(
nullptr,
}};
-static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos);
+static const uint32_t k_num_register_infos = std::size(g_register_infos);
const lldb_private::RegisterInfo *
ABIMacOSX_arm::GetRegisterInfoArray(uint32_t &count) {
llvm::ArrayRef<addr_t>::iterator ai = args.begin(), ae = args.end();
- for (size_t i = 0; i < llvm::array_lengthof(reg_names); ++i) {
+ for (size_t i = 0; i < std::size(reg_names); ++i) {
if (ai == ae)
break;
nullptr,
}};
-static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos);
+static const uint32_t k_num_register_infos = std::size(g_register_infos);
const lldb_private::RegisterInfo *
ABISysV_arm::GetRegisterInfoArray(uint32_t &count) {
llvm::ArrayRef<addr_t>::iterator ai = args.begin(), ae = args.end();
- for (size_t i = 0; i < llvm::array_lengthof(reg_names); ++i) {
+ for (size_t i = 0; i < std::size(reg_names); ++i) {
if (ai == ae)
break;
},
};
-static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos);
+static const uint32_t k_num_register_infos = std::size(g_register_infos);
const lldb_private::RegisterInfo *
ABISysV_mips::GetRegisterInfoArray(uint32_t &count) {
llvm::ArrayRef<addr_t>::iterator ai = args.begin(), ae = args.end();
// Write arguments to registers
- for (size_t i = 0; i < llvm::array_lengthof(reg_names); ++i) {
+ for (size_t i = 0; i < std::size(reg_names); ++i) {
if (ai == ae)
break;
},
};
-static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos_mips64);
+static const uint32_t k_num_register_infos = std::size(g_register_infos_mips64);
const lldb_private::RegisterInfo *
ABISysV_mips64::GetRegisterInfoArray(uint32_t &count) {
nullptr,
}};
-static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos);
+static const uint32_t k_num_register_infos = std::size(g_register_infos);
const lldb_private::RegisterInfo *
ABISysV_ppc::GetRegisterInfoArray(uint32_t &count) {
const lldb_private::RegisterInfo *
ABISysV_ppc64::GetRegisterInfoArray(uint32_t &count) {
if (GetByteOrder() == lldb::eByteOrderLittle) {
- count = llvm::array_lengthof(g_register_infos_ppc64le);
+ count = std::size(g_register_infos_ppc64le);
return g_register_infos_ppc64le;
} else {
- count = llvm::array_lengthof(g_register_infos_ppc64);
+ count = std::size(g_register_infos_ppc64);
return g_register_infos_ppc64;
}
}
DEFINE_REG(f15, 8, nullptr, LLDB_INVALID_REGNUM),
};
-static const uint32_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos);
+static const uint32_t k_num_register_infos = std::size(g_register_infos);
const lldb_private::RegisterInfo *
ABISysV_s390x::GetRegisterInfoArray(uint32_t &count) {
const uint32_t magicks[] = { llvm::MachO::MH_MAGIC_64, llvm::MachO::MH_MAGIC, llvm::MachO::MH_CIGAM, llvm::MachO::MH_CIGAM_64};
bool found_matching_pattern = false;
- for (size_t i = 0; i < llvm::array_lengthof (magicks); i++)
+ for (size_t i = 0; i < std::size(magicks); i++)
if (::memcmp (&header.magic, &magicks[i], sizeof (uint32_t)) == 0)
found_matching_pattern = true;
&EmulateInstructionARM::EmulateRFE, "rfe{<amode>} <Rn>{!}"}
};
- static const size_t k_num_arm_opcodes = llvm::array_lengthof(g_arm_opcodes);
+ static const size_t k_num_arm_opcodes = std::size(g_arm_opcodes);
for (size_t i = 0; i < k_num_arm_opcodes; ++i) {
if ((g_arm_opcodes[i].mask & opcode) == g_arm_opcodes[i].value &&
&EmulateInstructionARM::EmulateUXTH, "uxth<c>.w <Rd>,<Rm>{,<rotation>}"},
};
- const size_t k_num_thumb_opcodes = llvm::array_lengthof(g_thumb_opcodes);
+ const size_t k_num_thumb_opcodes = std::size(g_thumb_opcodes);
for (size_t i = 0; i < k_num_thumb_opcodes; ++i) {
if ((g_thumb_opcodes[i].mask & opcode) == g_thumb_opcodes[i].value &&
(g_thumb_opcodes[i].variants & arm_isa) != 0)
LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionARM64, InstructionARM64)
static bool LLDBTableGetRegisterInfo(uint32_t reg_num, RegisterInfo ®_info) {
- if (reg_num >= llvm::array_lengthof(g_register_infos_arm64_le))
+ if (reg_num >= std::size(g_register_infos_arm64_le))
return false;
reg_info = g_register_infos_arm64_le[reg_num];
return true;
"TBNZ <R><t>, #<imm>, <label>"},
};
- static const size_t k_num_arm_opcodes = llvm::array_lengthof(g_opcodes);
+ static const size_t k_num_arm_opcodes = std::size(g_opcodes);
for (size_t i = 0; i < k_num_arm_opcodes; ++i) {
if ((g_opcodes[i].mask & opcode) == g_opcodes[i].value)
}
static bool LLDBTableGetRegisterInfo(uint32_t reg_num, RegisterInfo ®_info) {
- if (reg_num >= llvm::array_lengthof(g_register_infos_ppc64le))
+ if (reg_num >= std::size(g_register_infos_ppc64le))
return false;
reg_info = g_register_infos_ppc64le[reg_num];
return true;
"addi RT, RA, SI"},
{0xfc000003, 0xe8000000, &EmulateInstructionPPC64::EmulateLD,
"ld RT, DS(RA)"}};
- static const size_t k_num_ppc_opcodes = llvm::array_lengthof(g_opcodes);
+ static const size_t k_num_ppc_opcodes = std::size(g_opcodes);
for (size_t i = 0; i < k_num_ppc_opcodes; ++i) {
if ((g_opcodes[i].mask & opcode) == g_opcodes[i].value)
// array into a template table, and populate the DispatchFunction
// map from there.
- for (size_t i = 0; i != llvm::array_lengthof(g_dispatch_functions); i++) {
+ for (size_t i = 0; i != std::size(g_dispatch_functions); i++) {
ConstString name_const_str(g_dispatch_functions[i].name);
const Symbol *msgSend_symbol =
m_objc_module_sp->FindFirstSymbolWithNameAndType(name_const_str,
m_msgSend_map.insert(std::pair<lldb::addr_t, int>(sym_addr, i));
}
}
-
+
// Similarly, cache the addresses of the "optimized dispatch" function.
- for (size_t i = 0; i != llvm::array_lengthof(g_opt_dispatch_names); i++) {
+ for (size_t i = 0; i != std::size(g_opt_dispatch_names); i++) {
ConstString name_const_str(g_opt_dispatch_names[i]);
const Symbol *msgSend_symbol =
m_objc_module_sp->FindFirstSymbolWithNameAndType(name_const_str,
}
llvm::StringRef ObjectFilePECOFF::GetSectionName(const section_header_t §) {
- llvm::StringRef hdr_name(sect.name, llvm::array_lengthof(sect.name));
+ llvm::StringRef hdr_name(sect.name, std::size(sect.name));
hdr_name = hdr_name.split('\0').first;
if (hdr_name.consume_front("/")) {
lldb::offset_t stroff;
lldb_r8_x86_64, lldb_r9_x86_64, lldb_r10_x86_64, lldb_r11_x86_64,
lldb_r12_x86_64, lldb_r13_x86_64, lldb_r14_x86_64, lldb_r15_x86_64};
- if (machine_reg >= llvm::array_lengthof(machine_to_lldb_register))
+ if (machine_reg >= std::size(machine_to_lldb_register))
return LLDB_INVALID_REGNUM;
return machine_to_lldb_register[machine_reg];
lldb_xmm12_x86_64, lldb_xmm13_x86_64, lldb_xmm14_x86_64,
lldb_xmm15_x86_64};
- if (xmm_reg >= llvm::array_lengthof(xmm_to_lldb_register))
+ if (xmm_reg >= std::size(xmm_to_lldb_register))
return LLDB_INVALID_REGNUM;
return xmm_to_lldb_register[xmm_reg];
"libSystem.B.dylib"};
FileSpecList bp_modules;
- for (size_t i = 0; i < llvm::array_lengthof(g_bp_modules); i++) {
+ for (size_t i = 0; i < std::size(g_bp_modules); i++) {
const char *bp_module = g_bp_modules[i];
bp_modules.EmplaceBack(bp_module);
}
bool hardware = false;
LazyBool skip_prologue = eLazyBoolNo;
bp_sp = target.CreateBreakpoint(&bp_modules, nullptr, g_bp_names,
- llvm::array_lengthof(g_bp_names),
- eFunctionNameTypeFull, eLanguageTypeUnknown,
- 0, skip_prologue, internal, hardware);
+ std::size(g_bp_names), eFunctionNameTypeFull,
+ eLanguageTypeUnknown, 0, skip_prologue,
+ internal, hardware);
bp_sp->SetBreakpointKind("thread-creation");
return bp_sp;
exc_exception, exc_fsr, exc_far,
};
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
+static size_t k_num_register_infos = std::size(g_register_infos);
RegisterContextDarwin_arm::RegisterContextDarwin_arm(
Thread &thread, uint32_t concrete_frame_idx)
}
// Number of registers in each register set
-const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
-const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
-const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
+const size_t k_num_gpr_registers = std::size(g_gpr_regnums);
+const size_t k_num_fpu_registers = std::size(g_fpu_regnums);
+const size_t k_num_exc_registers = std::size(g_exc_regnums);
// Register set definitions. The first definitions at register set index of
// zero is for all registers, followed by other registers sets. The register
{"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
{"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
-const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
+const size_t k_num_regsets = std::size(g_reg_sets);
size_t RegisterContextDarwin_arm::GetRegisterSetCount() {
return k_num_regsets;
static uint32_t g_exc_regnums[] = {exc_far, exc_esr, exc_exception};
-static size_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos_arm64_le);
+static size_t k_num_register_infos = std::size(g_register_infos_arm64_le);
RegisterContextDarwin_arm64::RegisterContextDarwin_arm64(
Thread &thread, uint32_t concrete_frame_idx)
}
// Number of registers in each register set
-const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
-const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
-const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
+const size_t k_num_gpr_registers = std::size(g_gpr_regnums);
+const size_t k_num_fpu_registers = std::size(g_fpu_regnums);
+const size_t k_num_exc_registers = std::size(g_exc_regnums);
// Register set definitions. The first definitions at register set index of
// zero is for all registers, followed by other registers sets. The register
{"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
{"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
-const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
+const size_t k_num_regsets = std::size(g_reg_sets);
size_t RegisterContextDarwin_arm64::GetRegisterSetCount() {
return k_num_regsets;
nullptr,
}};
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
+static size_t k_num_register_infos = std::size(g_register_infos);
RegisterContextDarwin_i386::RegisterContextDarwin_i386(
Thread &thread, uint32_t concrete_frame_idx)
static uint32_t g_exc_regnums[] = {exc_trapno, exc_err, exc_faultvaddr};
// Number of registers in each register set
-const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
-const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
-const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
+const size_t k_num_gpr_registers = std::size(g_gpr_regnums);
+const size_t k_num_fpu_registers = std::size(g_fpu_regnums);
+const size_t k_num_exc_registers = std::size(g_exc_regnums);
// Register set definitions. The first definitions at register set index of
// zero is for all registers, followed by other registers sets. The register
{"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
{"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
-const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
+const size_t k_num_regsets = std::size(g_reg_sets);
size_t RegisterContextDarwin_i386::GetRegisterSetCount() {
return k_num_regsets;
nullptr,
}};
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
+static size_t k_num_register_infos = std::size(g_register_infos);
RegisterContextDarwin_x86_64::RegisterContextDarwin_x86_64(
Thread &thread, uint32_t concrete_frame_idx)
static uint32_t g_exc_regnums[] = {exc_trapno, exc_err, exc_faultvaddr};
// Number of registers in each register set
-const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
-const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
-const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
+const size_t k_num_gpr_registers = std::size(g_gpr_regnums);
+const size_t k_num_fpu_registers = std::size(g_fpu_regnums);
+const size_t k_num_exc_registers = std::size(g_exc_regnums);
// Register set definitions. The first definitions at register set index of
// zero is for all registers, followed by other registers sets. The register
{"Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums},
{"Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums}};
-const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
+const size_t k_num_regsets = std::size(g_reg_sets);
size_t RegisterContextDarwin_x86_64::GetRegisterSetCount() {
return k_num_regsets;
}
uint32_t RegisterContextWindows_i386::GetRegisterCount() const {
- return llvm::array_lengthof(g_register_infos_i386);
+ return std::size(g_register_infos_i386);
}
uint32_t RegisterContextWindows_i386::GetUserRegisterCount() const {
- return llvm::array_lengthof(g_register_infos_i386);
+ return std::size(g_register_infos_i386);
}
size_t RegisterContextWindows_i386::GetGPRSize() const { return sizeof(GPR); }
}
uint32_t RegisterContextWindows_x86_64::GetRegisterCount() const {
- return llvm::array_lengthof(g_register_infos_x86_64);
+ return std::size(g_register_infos_x86_64);
}
uint32_t RegisterContextWindows_x86_64::GetUserRegisterCount() const {
- return llvm::array_lengthof(g_register_infos_x86_64);
+ return std::size(g_register_infos_x86_64);
}
size_t RegisterContextWindows_x86_64::GetGPRSize() const { return sizeof(GPR); }
};
static const RegisterSet g_reg_sets_WoW64[] = {
- {"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_regnums_WoW64) - 1, g_gpr_regnums_WoW64},
+ {"General Purpose Registers", "gpr", std::size(g_gpr_regnums_WoW64) - 1,
+ g_gpr_regnums_WoW64},
};
enum { k_num_register_sets = 1 };
"g_fpu_regnums_arm has wrong number of register infos");
static const RegisterSet g_reg_sets_arm[] = {
- {"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_regnums_arm) - 1, g_gpr_regnums_arm},
- {"Floating Point Registers", "fpr",
- llvm::array_lengthof(g_fpr_regnums_arm) - 1, g_fpr_regnums_arm},
+ {"General Purpose Registers", "gpr", std::size(g_gpr_regnums_arm) - 1,
+ g_gpr_regnums_arm},
+ {"Floating Point Registers", "fpr", std::size(g_fpr_regnums_arm) - 1,
+ g_fpr_regnums_arm},
};
enum { k_num_register_sets = 2 };
"g_fpu_regnums_arm64 has wrong number of register infos");
static const RegisterSet g_reg_sets_arm64[] = {
- {"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_regnums_arm64) - 1, g_gpr_regnums_arm64},
- {"Floating Point Registers", "fpr",
- llvm::array_lengthof(g_fpr_regnums_arm64) - 1, g_fpr_regnums_arm64},
+ {"General Purpose Registers", "gpr", std::size(g_gpr_regnums_arm64) - 1,
+ g_gpr_regnums_arm64},
+ {"Floating Point Registers", "fpr", std::size(g_fpr_regnums_arm64) - 1,
+ g_fpr_regnums_arm64},
};
enum { k_num_register_sets = 2 };
};
static const RegisterSet g_reg_sets_i386[] = {
- {"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_regnums_i386) - 1, g_gpr_regnums_i386},
+ {"General Purpose Registers", "gpr", std::size(g_gpr_regnums_i386) - 1,
+ g_gpr_regnums_i386},
};
enum { k_num_register_sets = 1 };
};
static const RegisterSet g_reg_sets_x86_64[] = {
- {"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_regnums_x86_64) - 1, g_gpr_regnums_x86_64},
- {"Floating Point Registers", "fpr",
- llvm::array_lengthof(g_fpr_regnums_x86_64) - 1, g_fpr_regnums_x86_64}};
+ {"General Purpose Registers", "gpr", std::size(g_gpr_regnums_x86_64) - 1,
+ g_gpr_regnums_x86_64},
+ {"Floating Point Registers", "fpr", std::size(g_fpr_regnums_x86_64) - 1,
+ g_fpr_regnums_x86_64}};
enum { k_num_register_sets = 2 };
#include "Plugins/Process/Utility/RegisterInfos_arm.h"
#undef DECLARE_REGISTER_INFOS_ARM_STRUCT
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos_arm);
+static size_t k_num_register_infos = std::size(g_register_infos_arm);
// Array of lldb register numbers used to define the set of all General Purpose
// Registers
};
RegisterSet g_register_sets[] = {
- {"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_reg_indices), g_gpr_reg_indices},
- {"Floating Point Registers", "fpu", llvm::array_lengthof(g_fpu_reg_indices),
+ {"General Purpose Registers", "gpr", std::size(g_gpr_reg_indices),
+ g_gpr_reg_indices},
+ {"Floating Point Registers", "fpu", std::size(g_fpu_reg_indices),
g_fpu_reg_indices},
};
RegisterContextWindows_arm::~RegisterContextWindows_arm() {}
size_t RegisterContextWindows_arm::GetRegisterCount() {
- return llvm::array_lengthof(g_register_infos_arm);
+ return std::size(g_register_infos_arm);
}
const RegisterInfo *
}
size_t RegisterContextWindows_arm::GetRegisterSetCount() {
- return llvm::array_lengthof(g_register_sets);
+ return std::size(g_register_sets);
}
const RegisterSet *RegisterContextWindows_arm::GetRegisterSet(size_t reg_set) {
#include "Plugins/Process/Utility/RegisterInfos_arm64.h"
#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
-static size_t k_num_register_infos =
- llvm::array_lengthof(g_register_infos_arm64_le);
+static size_t k_num_register_infos = std::size(g_register_infos_arm64_le);
// Array of lldb register numbers used to define the set of all General Purpose
// Registers
};
RegisterSet g_register_sets[] = {
- {"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_reg_indices), g_gpr_reg_indices},
- {"Floating Point Registers", "fpu", llvm::array_lengthof(g_fpu_reg_indices),
+ {"General Purpose Registers", "gpr", std::size(g_gpr_reg_indices),
+ g_gpr_reg_indices},
+ {"Floating Point Registers", "fpu", std::size(g_fpu_reg_indices),
g_fpu_reg_indices},
};
RegisterContextWindows_arm64::~RegisterContextWindows_arm64() {}
size_t RegisterContextWindows_arm64::GetRegisterCount() {
- return llvm::array_lengthof(g_register_infos_arm64_le);
+ return std::size(g_register_infos_arm64_le);
}
const RegisterInfo *
}
size_t RegisterContextWindows_arm64::GetRegisterSetCount() {
- return llvm::array_lengthof(g_register_sets);
+ return std::size(g_register_sets);
}
const RegisterSet *
{DEFINE_FPU_XMM(xmm14)},
{DEFINE_FPU_XMM(xmm15)}};
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
+static size_t k_num_register_infos = std::size(g_register_infos);
// Array of lldb register numbers used to define the set of all General Purpose
// Registers
};
RegisterSet g_register_sets[] = {
- {"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_reg_indices), g_gpr_reg_indices},
- {"Floating Point Registers", "fpu",
- llvm::array_lengthof(g_fpu_reg_indices), g_fpu_reg_indices}};
+ {"General Purpose Registers", "gpr", std::size(g_gpr_reg_indices),
+ g_gpr_reg_indices},
+ {"Floating Point Registers", "fpu", std::size(g_fpu_reg_indices),
+ g_fpu_reg_indices}};
}
// Constructors and Destructors
RegisterContextWindows_x64::~RegisterContextWindows_x64() {}
size_t RegisterContextWindows_x64::GetRegisterCount() {
- return llvm::array_lengthof(g_register_infos);
+ return std::size(g_register_infos);
}
const RegisterInfo *
}
size_t RegisterContextWindows_x64::GetRegisterSetCount() {
- return llvm::array_lengthof(g_register_sets);
+ return std::size(g_register_sets);
}
const RegisterSet *RegisterContextWindows_x64::GetRegisterSet(size_t reg_set) {
nullptr,
},
};
-static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos);
+static size_t k_num_register_infos = std::size(g_register_infos);
// Array of lldb register numbers used to define the set of all General Purpose
// Registers
eRegisterIndexEip, eRegisterIndexEflags};
RegisterSet g_register_sets[] = {
- {"General Purpose Registers", "gpr",
- llvm::array_lengthof(g_gpr_reg_indices), g_gpr_reg_indices},
+ {"General Purpose Registers", "gpr", std::size(g_gpr_reg_indices),
+ g_gpr_reg_indices},
};
}
RegisterContextWindows_x86::~RegisterContextWindows_x86() {}
size_t RegisterContextWindows_x86::GetRegisterCount() {
- return llvm::array_lengthof(g_register_infos);
+ return std::size(g_register_infos);
}
const RegisterInfo *
}
size_t RegisterContextWindows_x86::GetRegisterSetCount() {
- return llvm::array_lengthof(g_register_sets);
+ return std::size(g_register_sets);
}
const RegisterSet *RegisterContextWindows_x86::GetRegisterSet(size_t reg_set) {
DEF_Q(14),
DEF_Q(15)};
-constexpr size_t k_num_reg_infos = llvm::array_lengthof(g_reg_infos);
+constexpr size_t k_num_reg_infos = std::size(g_reg_infos);
// ARM general purpose registers.
const uint32_t g_gpr_regnums[] = {
};
// Skip the last LLDB_INVALID_REGNUM in each count below by subtracting 1
-constexpr size_t k_num_gpr_regs = llvm::array_lengthof(g_gpr_regnums) - 1;
-constexpr size_t k_num_fpu_regs = llvm::array_lengthof(g_fpu_regnums) - 1;
+constexpr size_t k_num_gpr_regs = std::size(g_gpr_regnums) - 1;
+constexpr size_t k_num_fpu_regs = std::size(g_fpu_regnums) - 1;
static RegisterSet g_reg_sets[] = {
{"General Purpose Registers", "gpr", k_num_gpr_regs, g_gpr_regnums},
{"Floating Point Registers", "fpu", k_num_fpu_regs, g_fpu_regnums},
};
-constexpr size_t k_num_reg_sets = llvm::array_lengthof(g_reg_sets);
+constexpr size_t k_num_reg_sets = std::size(g_reg_sets);
RegisterContextMinidump_ARM::RegisterContextMinidump_ARM(
lldb_private::Thread &thread, const DataExtractor &data, bool apple)
: RegisterContext(thread, 0), m_apple(apple) {
lldb::offset_t offset = 0;
m_regs.context_flags = data.GetU32(&offset);
- for (unsigned i = 0; i < llvm::array_lengthof(m_regs.r); ++i)
+ for (unsigned i = 0; i < std::size(m_regs.r); ++i)
m_regs.r[i] = data.GetU32(&offset);
m_regs.cpsr = data.GetU32(&offset);
m_regs.fpscr = data.GetU64(&offset);
- for (unsigned i = 0; i < llvm::array_lengthof(m_regs.d); ++i)
+ for (unsigned i = 0; i < std::size(m_regs.d); ++i)
m_regs.d[i] = data.GetU64(&offset);
lldbassert(k_num_regs == k_num_reg_infos);
}
DEF_H(31),
};
-constexpr size_t k_num_reg_infos = llvm::array_lengthof(g_reg_infos);
+constexpr size_t k_num_reg_infos = std::size(g_reg_infos);
// ARM64 general purpose registers.
const uint32_t g_gpr_regnums[] = {
};
// Skip the last LLDB_INVALID_REGNUM in each count below by subtracting 1
-constexpr size_t k_num_gpr_regs = llvm::array_lengthof(g_gpr_regnums) - 1;
-constexpr size_t k_num_fpu_regs = llvm::array_lengthof(g_fpu_regnums) - 1;
+constexpr size_t k_num_gpr_regs = std::size(g_gpr_regnums) - 1;
+constexpr size_t k_num_fpu_regs = std::size(g_fpu_regnums) - 1;
static RegisterSet g_reg_sets[] = {
{"General Purpose Registers", "gpr", k_num_gpr_regs, g_gpr_regnums},
{"Floating Point Registers", "fpu", k_num_fpu_regs, g_fpu_regnums},
};
-constexpr size_t k_num_reg_sets = llvm::array_lengthof(g_reg_sets);
+constexpr size_t k_num_reg_sets = std::size(g_reg_sets);
RegisterContextMinidump_ARM64::RegisterContextMinidump_ARM64(
lldb_private::Thread &thread, const DataExtractor &data)
{ArchSpec::eCore_uknownMach64, llvm::MachO::CPU_ARCH_ABI64, 0, 0xFF000000u, 0x00000000u}};
// clang-format on
-static const ArchDefinition g_macho_arch_def = {
- eArchTypeMachO, llvm::array_lengthof(g_macho_arch_entries),
- g_macho_arch_entries, "mach-o"};
+static const ArchDefinition g_macho_arch_def = {eArchTypeMachO,
+ std::size(g_macho_arch_entries),
+ g_macho_arch_entries, "mach-o"};
//===----------------------------------------------------------------------===//
// A table that gets searched linearly for matches. This table is used to
static const ArchDefinition g_elf_arch_def = {
eArchTypeELF,
- llvm::array_lengthof(g_elf_arch_entries),
+ std::size(g_elf_arch_entries),
g_elf_arch_entries,
"elf",
};
static const ArchDefinition g_coff_arch_def = {
eArchTypeCOFF,
- llvm::array_lengthof(g_coff_arch_entries),
+ std::size(g_coff_arch_entries),
g_coff_arch_entries,
"pe-coff",
};
}
static inline const CoreDefinition *FindCoreDefinition(ArchSpec::Core core) {
- if (core < llvm::array_lengthof(g_core_definitions))
+ if (core < std::size(g_core_definitions))
return &g_core_definitions[core];
return nullptr;
}
EXPECT_TRUE(success.Success());
WCHAR name[128]{};
- ULONG nameLen = llvm::array_lengthof(name);
+ ULONG nameLen = std::size(name);
ULONG langs = 0;
GetUserPreferredUILanguages(MUI_LANGUAGE_NAME, &langs,
reinterpret_cast<PZZWSTR>(&name), &nameLen);
projects / platform / upstream / llvm.git / commitdiff