const char *prop, const char *cells_prop,
int index, struct fdt_phandle_args *out_args);
-int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
- unsigned long *size);
+int fdt_get_node_addr_size(void *fdt, int node, uint64_t *addr,
+ uint64_t *size);
int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
unsigned long *out_addr, unsigned long *out_size,
u32 *out_first_hartid, u32 *out_hart_count);
-int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
+int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
const char *compatible);
#endif /* __FDT_HELPER_H__ */
}
static int fdt_translate_address(void *fdt, uint64_t reg, int parent,
- unsigned long *addr)
+ uint64_t *addr)
{
int i, rlen;
int cell_addr, cell_size;
return 0;
}
-int fdt_get_node_addr_size(void *fdt, int node, unsigned long *addr,
- unsigned long *size)
+int fdt_get_node_addr_size(void *fdt, int node, uint64_t *addr, uint64_t *size)
{
int parent, len, i, rc;
int cell_addr, cell_size;
{
int len, rc;
const fdt32_t *val;
- unsigned long reg_addr, reg_size;
+ uint64_t reg_addr, reg_size;
if (nodeoffset < 0 || !uart || !fdt)
return SBI_ENODEV;
{
int len, rc;
const fdt32_t *val;
- unsigned long reg_addr, reg_size;
+ uint64_t reg_addr, reg_size;
if (nodeoffset < 0 || !uart || !fdt)
return SBI_ENODEV;
{
int len, rc;
const fdt32_t *val;
- unsigned long reg_addr, reg_size;
+ uint64_t reg_addr, reg_size;
if (nodeoffset < 0 || !uart || !fdt)
return SBI_ENODEV;
{
int len, rc;
const fdt32_t *val;
- unsigned long reg_addr, reg_size;
+ uint64_t reg_addr, reg_size;
if (nodeoffset < 0 || !uart || !fdt)
return SBI_ENODEV;
{
int len, rc;
const fdt32_t *val;
- unsigned long reg_addr, reg_size;
+ uint64_t reg_addr, reg_size;
if (nodeoffset < 0 || !plic || !fdt)
return SBI_ENODEV;
u32 *out_first_hartid, u32 *out_hart_count)
{
const fdt32_t *val;
- unsigned long reg_addr, reg_size;
+ uint64_t reg_addr, reg_size;
int i, rc, count, cpu_offset, cpu_intc_offset;
u32 phandle, hwirq, hartid, first_hartid, last_hartid;
u32 match_hwirq = (for_timer) ? IRQ_M_TIMER : IRQ_M_SOFT;
return 0;
}
-int fdt_parse_compat_addr(void *fdt, unsigned long *addr,
+int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
const char *compatible)
{
int nodeoffset, rc;
{
int rc;
struct sifive_gpio_chip *chip;
+ uint64_t addr;
if (SIFIVE_GPIO_CHIP_MAX <= sifive_gpio_chip_count)
return SBI_ENOSPC;
chip = &sifive_gpio_chip_array[sifive_gpio_chip_count];
- rc = fdt_get_node_addr_size(fdt, nodeoff, &chip->addr, NULL);
+ rc = fdt_get_node_addr_size(fdt, nodeoff, &addr, NULL);
if (rc)
return rc;
+ chip->addr = addr;
chip->chip.driver = &fdt_gpio_sifive;
chip->chip.id = phandle;
chip->chip.ngpio = SIFIVE_GPIO_PINS_DEF;