docs/arm64: cpu-feature-registers: Rewrite bitfields that don't follow [e, s]

Commit "docs/arm64: cpu-feature-registers: Documents missing visible
fields" added bitfields following the convention [s, e]. However, the
documentation is following [s, e] and so does the Arm ARM.

Rewrite the bitfields to match the format [s, e].

Fixes: a8613e7070e7 ("docs/arm64: cpu-feature-registers: Documents missing visible fields")
Signed-off-by: Julien Grall <julien.grall@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
index ffcf4e2..7c40e45 100644 (file)
--- a/Documentation/arm64/cpu-feature-registers.rst
+++ b/Documentation/arm64/cpu-feature-registers.rst
@@ -193,9 +193,9 @@ infrastructure:
      +------------------------------+---------+---------+
      | Name                         |  bits   | visible |
      +------------------------------+---------+---------+
-     | SB                           | [36-39] |    y    |
+     | SB                           | [39-36] |    y    |
      +------------------------------+---------+---------+
-     | FRINTTS                      | [32-35] |    y    |
+     | FRINTTS                      | [35-32] |    y    |
      +------------------------------+---------+---------+
      | GPI                          | [31-28] |    y    |
      +------------------------------+---------+---------+