reset:starfive:jh7110: change how to obtain an assert address

Get assert addresses dynamically to reduce static array memory usage

Signed-off-by: samin <samin.guo@starfivetech.com>

diff --git a/drivers/reset/starfive/reset-starfive-jh7110.c b/drivers/reset/starfive/reset-starfive-jh7110.c
index 6de7a78..b699e04 100644 (file)
--- a/drivers/reset/starfive/reset-starfive-jh7110.c
+++ b/drivers/reset/starfive/reset-starfive-jh7110.c
@@ -25,17 +25,17 @@
 #define SYSCRG_RESET_STATUS2   0x310
 #define SYSCRG_RESET_STATUS3   0x314
 
-#define STGCRG_RESET_ASSERT0   0x74
-#define STGCRG_RESET_STATUS0   0x78
+#define STGCRG_RESET_ASSERT    0x74
+#define STGCRG_RESET_STATUS    0x78
 
-#define AONCRG_RESET_ASSERT0   0x38
-#define AONCRG_RESET_STATUS0   0x3C
+#define AONCRG_RESET_ASSERT    0x38
+#define AONCRG_RESET_STATUS    0x3C
 
-#define ISPCRG_RESET_ASSERT0   0x38
-#define ISPCRG_RESET_STATUS0   0x3C
+#define ISPCRG_RESET_ASSERT    0x38
+#define ISPCRG_RESET_STATUS    0x3C
 
-#define VOUTCRG_RESET_ASSERT0  0x48
-#define VOUTCRG_RESET_STATUS0  0x4C
+#define VOUTCRG_RESET_ASSERT   0x48
+#define VOUTCRG_RESET_STATUS   0x4C
 
 struct reset_assert_t {
        void *__iomem reg_assert;
@@ -47,14 +47,13 @@ enum JH7110_RESET_CRG_GROUP {
        SYSCRG_1,
        SYSCRG_2,
        SYSCRG_3,
-       STGCRG_0,
-       AONCRG_0,
-       ISPCRG_0,
-       VOUTCRG_0,
+       STGCRG,
+       AONCRG,
+       ISPCRG,
+       VOUTCRG,
 };
 
 struct jh7110_reset {
-       struct reset_assert_t reset_assert[8];
        struct reset_controller_dev rcdev;
        /* protect registers against concurrent read-modify-write */
        spinlock_t lock;
@@ -105,39 +104,55 @@ jh7110_reset_from(struct reset_controller_dev *rcdev)
        return container_of(rcdev, struct jh7110_reset, rcdev);
 }
 
-static void jh7110_devm_reset_set(struct device *dev)
+static int jh7110_get_reset(struct jh7110_reset *data,
+                               struct reset_assert_t *reset,
+                               unsigned long group)
 {
-       struct jh7110_reset *data = dev->driver_data;
-
-       data->reset_assert[SYSCRG_0].reg_assert = data->syscrg + SYSCRG_RESET_ASSERT0;
-       data->reset_assert[SYSCRG_0].reg_status = data->syscrg + SYSCRG_RESET_STATUS0;
-
-       data->reset_assert[SYSCRG_1].reg_assert = data->syscrg + SYSCRG_RESET_ASSERT1;
-       data->reset_assert[SYSCRG_1].reg_status = data->syscrg + SYSCRG_RESET_STATUS1;
-
-       data->reset_assert[SYSCRG_2].reg_assert = data->syscrg + SYSCRG_RESET_ASSERT2;
-       data->reset_assert[SYSCRG_2].reg_status = data->syscrg + SYSCRG_RESET_STATUS2;
-
-       data->reset_assert[SYSCRG_3].reg_assert = data->syscrg + SYSCRG_RESET_ASSERT3;
-       data->reset_assert[SYSCRG_3].reg_status = data->syscrg + SYSCRG_RESET_STATUS3;
-
-       data->reset_assert[STGCRG_0].reg_assert = data->stgcrg + STGCRG_RESET_ASSERT0;
-       data->reset_assert[STGCRG_0].reg_status = data->stgcrg + STGCRG_RESET_STATUS0;
-
-       data->reset_assert[AONCRG_0].reg_assert = data->aoncrg + AONCRG_RESET_ASSERT0;
-       data->reset_assert[AONCRG_0].reg_status = data->aoncrg + AONCRG_RESET_STATUS0;
-
-       data->reset_assert[ISPCRG_0].reg_assert = data->ispcrg + ISPCRG_RESET_ASSERT0;
-       data->reset_assert[ISPCRG_0].reg_status = data->ispcrg + ISPCRG_RESET_STATUS0;
+       switch (group) {
+       case SYSCRG_0:
+               reset->reg_assert = data->syscrg + SYSCRG_RESET_ASSERT0;
+               reset->reg_status = data->syscrg + SYSCRG_RESET_STATUS0;
+               break;
+       case SYSCRG_1:
+               reset->reg_assert = data->syscrg + SYSCRG_RESET_ASSERT1;
+               reset->reg_status = data->syscrg + SYSCRG_RESET_STATUS1;
+               break;
+       case SYSCRG_2:
+               reset->reg_assert = data->syscrg + SYSCRG_RESET_ASSERT2;
+               reset->reg_status = data->syscrg + SYSCRG_RESET_STATUS2;
+               break;
+       case SYSCRG_3:
+               reset->reg_assert = data->syscrg + SYSCRG_RESET_ASSERT3;
+               reset->reg_status = data->syscrg + SYSCRG_RESET_STATUS3;
+               break;
+       case STGCRG:
+               reset->reg_assert = data->stgcrg + STGCRG_RESET_ASSERT;
+               reset->reg_status = data->stgcrg + STGCRG_RESET_STATUS;
+               break;
+       case AONCRG:
+               reset->reg_assert = data->aoncrg + AONCRG_RESET_ASSERT;
+               reset->reg_status = data->aoncrg + AONCRG_RESET_STATUS;
+               break;
+       case ISPCRG:
+               reset->reg_assert = data->ispcrg + ISPCRG_RESET_ASSERT;
+               reset->reg_status = data->ispcrg + ISPCRG_RESET_STATUS;
+               break;
+       case VOUTCRG:
+               reset->reg_assert = data->voutcrg + VOUTCRG_RESET_ASSERT;
+               reset->reg_status = data->voutcrg + VOUTCRG_RESET_STATUS;
+               break;
+       default:
+               return -EINVAL;
+       }
 
-       data->reset_assert[VOUTCRG_0].reg_assert = data->voutcrg + VOUTCRG_RESET_ASSERT0;
-       data->reset_assert[VOUTCRG_0].reg_status = data->voutcrg + VOUTCRG_RESET_STATUS0;
+       return 0;
 }
 
 static int jh7110_reset_update(struct reset_controller_dev *rcdev,
                               unsigned long id, bool assert)
 {
        struct jh7110_reset *data = jh7110_reset_from(rcdev);
+       struct reset_assert_t reset;
        void __iomem *reg_assert, *reg_status;
        unsigned long group, flags;
        u32 mask, value, done;
@@ -145,8 +160,9 @@ static int jh7110_reset_update(struct reset_controller_dev *rcdev,
 
        group = id / 32;
        mask =  BIT(id % 32);
-       reg_assert = data->reset_assert[group].reg_assert;
-       reg_status = data->reset_assert[group].reg_status;
+       jh7110_get_reset(data, &reset, group);
+       reg_assert = reset.reg_assert;
+       reg_status = reset.reg_status;
 
        done = data->asserted[group] & mask;
 
@@ -200,14 +216,14 @@ static int jh7110_reset_status(struct reset_controller_dev *rcdev,
                               unsigned long id)
 {
        struct jh7110_reset *data = jh7110_reset_from(rcdev);
-       void __iomem *reg_status;
+       struct reset_assert_t reset;
        unsigned long group;
        u32 mask, val;
 
        group = id / 32;
        mask =  BIT(id % 32);
-       reg_status = data->reset_assert[group].reg_status;
-       val = readl(reg_status);
+       jh7110_get_reset(data, &reset, group);
+       val = readl(reset.reg_status);
 
        return !((val ^ data->asserted[group]) & mask);
 }
@@ -266,8 +282,6 @@ int __init reset_starfive_jh7110_generic_probe(struct platform_device *pdev,
        if (IS_ERR(data->voutcrg))
                return PTR_ERR(data->voutcrg);
 
-       jh7110_devm_reset_set(dev);
-
        data->rcdev.ops = &jh7110_reset_ops;
        data->rcdev.owner = THIS_MODULE;
        data->rcdev.nr_resets = nr_resets;