drm/bridge: lt8912b: add vsync hsync
authorPhilippe Schenker <philippe.schenker@toradex.com>
Thu, 22 Sep 2022 12:43:03 +0000 (14:43 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 5 Oct 2022 08:39:41 +0000 (10:39 +0200)
[ Upstream commit da73a94fa282f78d485bd0aab36c8ac15b6f792c ]

Currently the bridge driver does not take care whether or not the display
needs positive/negative vertical/horizontal syncs. Pass these two flags
to the bridge from the EDID that was read out from the display.

Fixes: 30e2ae943c26 ("drm/bridge: Introduce LT8912B DSI to HDMI bridge")
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Adrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220922124306.34729-2-dev@pschenker.ch
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/bridge/lontium-lt8912b.c

index 1b0c7ea..0fae72d 100644 (file)
@@ -266,7 +266,7 @@ static int lt8912_video_setup(struct lt8912 *lt)
        u32 hactive, h_total, hpw, hfp, hbp;
        u32 vactive, v_total, vpw, vfp, vbp;
        u8 settle = 0x08;
-       int ret;
+       int ret, hsync_activehigh, vsync_activehigh;
 
        if (!lt)
                return -EINVAL;
@@ -276,12 +276,14 @@ static int lt8912_video_setup(struct lt8912 *lt)
        hpw = lt->mode.hsync_len;
        hbp = lt->mode.hback_porch;
        h_total = hactive + hfp + hpw + hbp;
+       hsync_activehigh = lt->mode.flags & DISPLAY_FLAGS_HSYNC_HIGH;
 
        vactive = lt->mode.vactive;
        vfp = lt->mode.vfront_porch;
        vpw = lt->mode.vsync_len;
        vbp = lt->mode.vback_porch;
        v_total = vactive + vfp + vpw + vbp;
+       vsync_activehigh = lt->mode.flags & DISPLAY_FLAGS_VSYNC_HIGH;
 
        if (vactive <= 600)
                settle = 0x04;
@@ -315,6 +317,11 @@ static int lt8912_video_setup(struct lt8912 *lt)
        ret |= regmap_write(lt->regmap[I2C_CEC_DSI], 0x3e, hfp & 0xff);
        ret |= regmap_write(lt->regmap[I2C_CEC_DSI], 0x3f, hfp >> 8);
 
+       ret |= regmap_update_bits(lt->regmap[I2C_MAIN], 0xab, BIT(0),
+                                 vsync_activehigh ? BIT(0) : 0);
+       ret |= regmap_update_bits(lt->regmap[I2C_MAIN], 0xab, BIT(1),
+                                 hsync_activehigh ? BIT(1) : 0);
+
        return ret;
 }