modify pinctrl about vin_dvp function sel
authorjianlong.huang <jianlong.huang@starfivetech.com>
Wed, 13 Apr 2022 10:27:52 +0000 (18:27 +0800)
committerjianlong.huang <jianlong.huang@starfivetech.com>
Wed, 13 Apr 2022 11:18:06 +0000 (19:18 +0800)
Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c
drivers/pinctrl/starfive/pinctrl-starfive.c
drivers/pinctrl/starfive/pinctrl-starfive.h

index 2a49481..2aaf998 100644 (file)
@@ -1016,7 +1016,7 @@ static int starfive_jh7110_sys_pmx_set_one_pin_mux(struct starfive_pinctrl *pctl
                
        raw_spin_lock_irqsave(&pctl->lock, flags);
        if(pin_reg->func_sel_reg != -1){
-               pinctrl_set_reg(pctl->padctl_base + pin_reg->func_sel_reg, 
+               pinctrl_set_reg(pctl->padctl_base + pin_reg->func_sel_reg,
                        pin_config->pinmux_func, pin_reg->func_sel_shift,
                        pin_reg->func_sel_mask);
        }
@@ -1041,9 +1041,15 @@ static int starfive_jh7110_sys_pmx_set_one_pin_mux(struct starfive_pinctrl *pctl
 
        if(pin_reg->syscon_reg != -1){
                pinctrl_set_reg(pctl->padctl_base + pin_reg->syscon_reg, 
-                               pin_config->syscon, PADCFG_PAD_GMAC_SYSCON_SHIFT, 
+                               pin_config->syscon, PADCFG_PAD_GMAC_SYSCON_SHIFT,
                                PADCFG_PAD_GMAC_SYSCON_MASK);
        }
+
+       if(pin_reg->pad_sel_reg != -1){
+               pinctrl_set_reg(pctl->padctl_base + pin_reg->pad_sel_reg,
+                       pin_config->padmux_func, pin_reg->pad_sel_shift,
+                       pin_reg->pad_sel_mask);
+       }
        raw_spin_unlock_irqrestore(&pctl->lock, flags);
        
        return 0;
@@ -1098,6 +1104,14 @@ static void starfive_jh7110_sys_parse_pin_config(struct starfive_pinctrl *pctl,
                pin_data->pin_config.pinmux_func = be32_to_cpu(*list++);
        }
 
+       list = of_get_property(np, "sf,padmux", &size);
+       if (list) {
+               pin_reg->pad_sel_reg = be32_to_cpu(*list++);
+               pin_reg->pad_sel_shift = be32_to_cpu(*list++);
+               pin_reg->pad_sel_mask = be32_to_cpu(*list++);
+               pin_data->pin_config.padmux_func = be32_to_cpu(*list++);
+       }
+
        list = of_get_property(np, "sf,pin-syscon", &size);
        if (list) {
                pin_reg->syscon_reg = be32_to_cpu(*list++);
index 72a2bbe..c5b5411 100644 (file)
@@ -443,6 +443,7 @@ int starfive_pinctrl_probe(struct platform_device *pdev,
                pctl->pin_regs[i].gpo_doen_reg = -1;
                pctl->pin_regs[i].func_sel_reg = -1;
                pctl->pin_regs[i].syscon_reg = -1;
+               pctl->pin_regs[i].pad_sel_reg = -1;
        }
        
        pctl->padctl_base = devm_platform_ioremap_resource_byname(pdev, "control");
index 4bd4ea4..a567278 100644 (file)
@@ -44,6 +44,7 @@ struct starfive_pin_config {
        u32 gpio_din_num;
        s32 *gpio_din_reg;
        s32 syscon;
+       s32 padmux_func;
 };
 
 struct starfive_pin {
@@ -59,6 +60,9 @@ struct starfive_pin_reg {
        s32 func_sel_shift;
        s32 func_sel_mask;
        s32 syscon_reg;
+       s32 pad_sel_reg;
+       s32 pad_sel_shift;
+       s32 pad_sel_mask;
 };
 
 struct starfive_iopad_sel_func_inf {