#include <linux/backlight.h>
#include <linux/version.h>
+#include <linux/bitops.h>
#include <drm/drmP.h>
#include <drm/drm.h>
#include <drm/drm_crtc.h>
#define MDFLD_DSI_BRIGHTNESS_MAX_LEVEL 100
-#ifdef DEBUG
-#define CHECK_PIPE(pipe) ({ \
- const typeof(pipe) __pipe = (pipe); \
- BUG_ON(__pipe != 0 && __pipe != 2); \
- __pipe; })
-#else
-#define CHECK_PIPE(pipe) (pipe)
-#endif
-
/*
* Actual MIPIA->MIPIC reg offset is 0x800, value 0x400 is valid for 0 and 2
*/
-#define REG_OFFSET(pipe) (CHECK_PIPE(pipe) * 0x400)
+#define CHECK_MIPI_PIPE(pipe) \
+ (PSB_CHECK_PIPE(pipe, BIT(0) | BIT(2)))
+
+#define REG_OFFSET(pipe) (CHECK_MIPI_PIPE(pipe) * 0x400)
/* mdfld DSI controller registers */
#define MIPI_DEVICE_READY_REG(pipe) (0xb000 + REG_OFFSET(pipe))
#define MIPI_CMD_LEN_REG(pipe) (0xb114 + REG_OFFSET(pipe))
/* non-uniform reg offset */
-#define MIPI_PORT_CONTROL(pipe) (CHECK_PIPE(pipe) ? MIPI_C : MIPI)
+#define MIPI_PORT_CONTROL(pipe) \
+ (CHECK_MIPI_PIPE(pipe) ? MIPI_C : MIPI)
#define DSI_DEVICE_READY (0x1)
#define DSI_POWER_STATE_ULPS_ENTER (0x2 << 1)
#ifndef __PSB_INTEL_REG_H__
#define __PSB_INTEL_REG_H__
+#ifdef DEBUG
+#define PSB_CHECK_PIPE(pipe, valid_pipes) ({ \
+ const typeof(pipe) __pipe = (pipe); \
+ BUG_ON(!((1 << __pipe) & (valid_pipes))); \
+ __pipe; })
+#else
+#define PSB_CHECK_PIPE(pipe, valid_pipes) (pipe)
+#endif
+
#define BLC_PWM_CTL 0x61254
#define BLC_PWM_CTL2 0x61250
#define BLC_PWM_CTL_C 0x62254