MIR Serialization: Serialize the stack pseudo source values.

llvm-svn: 244806

diff --git a/llvm/lib/CodeGen/MIRParser/MILexer.cpp b/llvm/lib/CodeGen/MIRParser/MILexer.cpp
index c94c398..8a6a1ff 100644 (file)
--- a/llvm/lib/CodeGen/MIRParser/MILexer.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MILexer.cpp
@@ -201,6 +201,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
       .Case("non-temporal", MIToken::kw_non_temporal)
       .Case("invariant", MIToken::kw_invariant)
       .Case("align", MIToken::kw_align)
+      .Case("stack", MIToken::kw_stack)
       .Case("constant-pool", MIToken::kw_constant_pool)
       .Case("liveout", MIToken::kw_liveout)
       .Default(MIToken::Identifier);

diff --git a/llvm/lib/CodeGen/MIRParser/MILexer.h b/llvm/lib/CodeGen/MIRParser/MILexer.h
index 75cf3f3..2c7a32c 100644 (file)
--- a/llvm/lib/CodeGen/MIRParser/MILexer.h
+++ b/llvm/lib/CodeGen/MIRParser/MILexer.h
@@ -70,6 +70,7 @@ struct MIToken {
     kw_non_temporal,
     kw_invariant,
     kw_align,
+    kw_stack,
     kw_constant_pool,
     kw_liveout,
 

diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index afa6ffc..47a9eaf 100644 (file)
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -1121,6 +1121,9 @@ bool MIParser::parseMemoryOperandFlag(unsigned &Flags) {
 
 bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
   switch (Token.kind()) {
+  case MIToken::kw_stack:
+    PSV = MF.getPSVManager().getStack();
+    break;
   case MIToken::kw_constant_pool:
     PSV = MF.getPSVManager().getConstantPool();
     break;
@@ -1133,7 +1136,7 @@ bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
 }
 
 bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
-  if (Token.is(MIToken::kw_constant_pool)) {
+  if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack)) {
     const PseudoSourceValue *PSV = nullptr;
     if (parseMemoryPseudoSourceValue(PSV))
       return true;

diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index d47ed97..019383c 100644 (file)
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -710,6 +710,9 @@ void MIPrinter::print(const MachineMemOperand &Op) {
     const PseudoSourceValue *PVal = Op.getPseudoValue();
     assert(PVal && "Expected a pseudo source value");
     switch (PVal->kind()) {
+    case PseudoSourceValue::Stack:
+      OS << "stack";
+      break;
     case PseudoSourceValue::ConstantPool:
       OS << "constant-pool";
       break;

diff --git a/llvm/test/CodeGen/MIR/X86/memory-operands.mir b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
index f84ebfb..289a5f6 100644 (file)
--- a/llvm/test/CodeGen/MIR/X86/memory-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
@@ -65,6 +65,16 @@
     ret double %b
   }
 
+  declare x86_fp80 @cosl(x86_fp80) #0
+
+  define x86_fp80 @stack_psv(x86_fp80 %x) {
+  entry:
+    %y = call x86_fp80 @cosl(x86_fp80 %x) #0
+    ret x86_fp80 %y
+  }
+
+  attributes #0 = { readonly }
+
 ...
 ---
 name:            test
@@ -211,3 +221,28 @@ body:
       - '%xmm0 = ADDSDrm killed %xmm0, %rip, 1, _, %const.0, _ :: (load 8 from constant-pool + 8)'
       - 'RETQ %xmm0'
 ...
+---
+name:            stack_psv
+tracksRegLiveness: true
+frameInfo:
+  stackSize:       24
+  maxAlignment:    16
+  adjustsStack:    true
+  hasCalls:        true
+  maxCallFrameSize: 16
+fixedStack:
+  - { id: 0, offset: 0, size: 10, alignment: 16, isImmutable: true, isAliased: false }
+body:
+  - id:          0
+    name:        entry
+    instructions:
+      - '%rsp = frame-setup SUB64ri8 %rsp, 24, implicit-def dead %eflags'
+      - CFI_INSTRUCTION .cfi_def_cfa_offset 32
+      - 'LD_F80m %rsp, 1, _, 32, _, implicit-def dead %fpsw'
+# CHECK: name: stack_psv
+# CHECK: ST_FP80m %rsp, 1, _, 0, _, implicit-def dead %fpsw :: (store 10 into stack, align 16)
+      - 'ST_FP80m %rsp, 1, _, 0, _, implicit-def dead %fpsw :: (store 10 into stack, align 16)'
+      - 'CALL64pcrel32 $cosl, csr_64, implicit %rsp, implicit-def %rsp, implicit-def %fp0'
+      - '%rsp = ADD64ri8 %rsp, 24, implicit-def dead %eflags'
+      - RETQ
+...