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[RISCV] Remove isel patterns for fshl/fshr with same inputs. NFC
author
Craig Topper
<craig.topper@sifive.com>
Tue, 3 Nov 2020 06:54:20 +0000
(22:54 -0800)
committer
Craig Topper
<craig.topper@sifive.com>
Tue, 3 Nov 2020 07:12:18 +0000
(23:12 -0800)
These were being selected to ROL/ROR, but DAG combine should
canonicalize fshl/fshr with same inputs to rotl/rotr which we
also have patterns for.
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
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diff --git
a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
index
c85ab79
..
aecb429
100644
(file)
--- a/
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+++ b/
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
@@
-665,9
+665,7
@@
def : Pat<(xor (srl (xor GPR:$rs1, -1), GPR:$rs2), -1),
let Predicates = [HasStdExtZbbOrZbp] in {
def : Pat<(rotl GPR:$rs1, GPR:$rs2), (ROL GPR:$rs1, GPR:$rs2)>;
-def : Pat<(fshl GPR:$rs1, GPR:$rs1, GPR:$rs2), (ROL GPR:$rs1, GPR:$rs2)>;
def : Pat<(rotr GPR:$rs1, GPR:$rs2), (ROR GPR:$rs1, GPR:$rs2)>;
-def : Pat<(fshr GPR:$rs1, GPR:$rs1, GPR:$rs2), (ROR GPR:$rs1, GPR:$rs2)>;
} // Predicates = [HasStdExtZbbOrZbp]
let Predicates = [HasStdExtZbs, IsRV32] in