drm/i915: Use intel_de_rmw() in bxt/glk/cnl+ cdclk programming

Replace the hand rolled rmw sequences with intel_de_rmw().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210430153444.29270-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 45c4070910dcf5d7f2438b07b27442ce12a87555..b7d4aa2d729783ecc3e0dc305ac38d1a094f6bd7 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1473,12 +1473,9 @@ static void bxt_de_pll_disable(struct drm_i915_private *dev_priv)
 static void bxt_de_pll_enable(struct drm_i915_private *dev_priv, int vco)
 {
        int ratio = DIV_ROUND_CLOSEST(vco, dev_priv->cdclk.hw.ref);
-       u32 val;
 
-       val = intel_de_read(dev_priv, BXT_DE_PLL_CTL);
-       val &= ~BXT_DE_PLL_RATIO_MASK;
-       val |= BXT_DE_PLL_RATIO(ratio);
-       intel_de_write(dev_priv, BXT_DE_PLL_CTL, val);
+       intel_de_rmw(dev_priv, BXT_DE_PLL_CTL,
+                    BXT_DE_PLL_RATIO_MASK, BXT_DE_PLL_RATIO(ratio));
 
        intel_de_write(dev_priv, BXT_DE_PLL_ENABLE, BXT_DE_PLL_PLL_ENABLE);
 
@@ -1492,11 +1489,8 @@ static void bxt_de_pll_enable(struct drm_i915_private *dev_priv, int vco)
 
 static void cnl_cdclk_pll_disable(struct drm_i915_private *dev_priv)
 {
-       u32 val;
-
-       val = intel_de_read(dev_priv, BXT_DE_PLL_ENABLE);
-       val &= ~BXT_DE_PLL_PLL_ENABLE;
-       intel_de_write(dev_priv, BXT_DE_PLL_ENABLE, val);
+       intel_de_rmw(dev_priv, BXT_DE_PLL_ENABLE,
+                    BXT_DE_PLL_PLL_ENABLE, 0);
 
        /* Timeout 200us */
        if (wait_for((intel_de_read(dev_priv, BXT_DE_PLL_ENABLE) & BXT_DE_PLL_LOCK) == 0, 1))