Pipeline barriers flushing buffer data to host

Adds pipeline barriers after vkCmdDispatch which essentially flushes gpu
caches and the buffer data becomes visible to the host.

Affects:
dEQP-VK.spirv_assembly.instruction.compute.*
dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop_opquantize.*

Components: Vulkan

VK-GL-CTS issue: 1880

Change-Id: Ib99a4ed9a1a2d57b286dea2251b3bc4a67002dfb

diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmComputeShaderCase.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmComputeShaderCase.cpp
index cb594f7..66f9cc6 100644 (file)
--- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmComputeShaderCase.cpp
+++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmComputeShaderCase.cpp
@@ -738,6 +738,25 @@ tcu::TestStatus SpvAsmComputeShaderInstance::iterate (void)
                vkdi.cmdPushConstants(*cmdBuffer, *pipelineLayout, VK_SHADER_STAGE_COMPUTE_BIT, /* offset = */ 0, /* size = */ size, data);
        }
        vkdi.cmdDispatch(*cmdBuffer, numWorkGroups.x(), numWorkGroups.y(), numWorkGroups.z());
+
+       // Insert a barrier so data written by the shader is available to the host
+       for (deUint32 outputBufferNdx = 0; outputBufferNdx < outputBuffers.size(); ++outputBufferNdx)
+       {
+               const VkBufferMemoryBarrier buf_barrier =
+               {
+                       VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER,        //    VkStructureType    sType;
+                       DE_NULL,                                                                        //    const void*        pNext;
+                       VK_ACCESS_SHADER_WRITE_BIT,                                     //    VkAccessFlags      srcAccessMask;
+                       VK_ACCESS_HOST_READ_BIT,                                        //    VkAccessFlags      dstAccessMask;
+                       VK_QUEUE_FAMILY_IGNORED,                                        //    uint32_t           srcQueueFamilyIndex;
+                       VK_QUEUE_FAMILY_IGNORED,                                        //    uint32_t           dstQueueFamilyIndex;
+                       **outputBuffers[outputBufferNdx],                       //    VkBuffer           buffer;
+                       0,                                                                                      //    VkDeviceSize       offset;
+                       VK_WHOLE_SIZE                                                           //    VkDeviceSize       size;
+               };
+
+               vkdi.cmdPipelineBarrier(*cmdBuffer, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, VK_PIPELINE_STAGE_HOST_BIT, 0, 0, DE_NULL, 1, &buf_barrier, 0, DE_NULL);
+       }
        endCommandBuffer(vkdi, *cmdBuffer);
 
        submitCommandsAndWait(vkdi, device, queue, *cmdBuffer);