PR target/11012

	* config/m32r/m32r.c (gen_compare): Call gen_addsi3 instead of
	gen_cmp_ne_small_const_insn.
	* config/m32r/m32r.md (cmp_ne_small_const_insn): Remove.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@74726 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2ccddfa..40a362f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2003-12-16  Kazu Hirata  <kazu@cs.umass.edu>
+
+       PR target/11012
+       * config/m32r/m32r.c (gen_compare): Call gen_addsi3 instead of
+       gen_cmp_ne_small_const_insn.
+       * config/m32r/m32r.md (cmp_ne_small_const_insn): Remove.
+
 2003-12-17  Neil Booth  <neil@daikokuya.co.uk>
             Joseph S. Myers  <jsm@polyomino.org.uk>
 

diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c
index 33a856d..a5a2b26 100644 (file)
--- a/gcc/config/m32r/m32r.c
+++ b/gcc/config/m32r/m32r.c
@@ -1000,7 +1000,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
            {
              rtx tmp = gen_reg_rtx (SImode);           
              
-             emit_insn (gen_cmp_ne_small_const_insn (tmp, x, y));
+             emit_insn (gen_addsi3 (tmp, x, GEN_INT (-INTVAL (y))));
              x = tmp;
              y = const0_rtx;
            }
@@ -1035,7 +1035,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
                  if (y == const0_rtx)
                    tmp = const1_rtx;
                  else
-                   emit_insn (gen_cmp_ne_small_const_insn (tmp, y, const1_rtx));
+                   emit_insn (gen_addsi3 (tmp, y, constm1_rtx));
                  emit_insn (gen_cmp_ltsi_insn (x, tmp));
                  code = EQ;
                  break;
@@ -1043,7 +1043,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
                  if (GET_CODE (y) == CONST_INT)
                    tmp = gen_rtx (PLUS, SImode, y, const1_rtx);
                  else
-                   emit_insn (gen_cmp_ne_small_const_insn (tmp, y, const1_rtx));
+                   emit_insn (gen_addsi3 (tmp, y, constm1_rtx));
                  emit_insn (gen_cmp_ltsi_insn (x, tmp));
                  code = NE;
                  break;
@@ -1075,7 +1075,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
                  if (y == const0_rtx)
                    tmp = const1_rtx;
                  else
-                   emit_insn (gen_cmp_ne_small_const_insn (tmp, y, const1_rtx));
+                   emit_insn (gen_addsi3 (tmp, y, constm1_rtx));
                  emit_insn (gen_cmp_ltusi_insn (x, tmp));
                  code = EQ;
                  break;
@@ -1083,7 +1083,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
                  if (GET_CODE (y) == CONST_INT)
                    tmp = gen_rtx (PLUS, SImode, y, const1_rtx);
                  else
-                   emit_insn (gen_cmp_ne_small_const_insn (tmp, y, const1_rtx));
+                   emit_insn (gen_addsi3 (tmp, y, constm1_rtx));
                  emit_insn (gen_cmp_ltusi_insn (x, tmp));
                  code = NE;
                  break;
@@ -1122,7 +1122,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
        {
          rtx tmp = gen_reg_rtx (SImode);
 
-         emit_insn (gen_cmp_ne_small_const_insn (tmp, x, y));
+         emit_insn (gen_addsi3 (tmp, x, GEN_INT (-INTVAL (y))));
          return gen_rtx (code, CCmode, tmp, const0_rtx);
        }
       

diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md
index 1c76aa3..709c194 100644 (file)
--- a/gcc/config/m32r/m32r.md
+++ b/gcc/config/m32r/m32r.md
@@ -1241,23 +1241,6 @@
    cmpui %0,%#%1"
   [(set_attr "type" "int2,int4")
    (set_attr "length" "2,4")])
-
-
-;; reg == small constant comparisons are best handled by putting the result
-;; of the comparison in a tmp reg and then using beqz/bnez.
-;; ??? The result register doesn't contain 0/STORE_FLAG_VALUE,
-;; it contains 0/nonzero.
-
-(define_insn "cmp_ne_small_const_insn"
-  [(set (match_operand:SI 0 "register_operand" "=r,r")
-       (ne:SI (match_operand:SI 1 "register_operand" "0,r")
-              (match_operand:SI 2 "cmp_int16_operand" "N,P")))]
-  ""
-  "@
-   addi %0,%#%N2
-   add3 %0,%1,%#%N2"
-  [(set_attr "type" "int2,int4")
-   (set_attr "length" "2,4")])
 \f
 ;; These control RTL generation for conditional jump insns.