Try to organize MachineVerifier tests

The Verifier is separate from the MachineVerifier, so move it to a
different directory. Some other verifier tests were scattered in
target codegen tests as well (although I'm sure I missed some). Work
towards using a more consistent naming scheme to make it clearer where
the gaps still are for generic instructions.

llvm-svn: 354138

diff --git a/llvm/test/Verifier/test_copy.mir b/llvm/test/MachineVerifier/test_copy.mir
similarity index 100%
rename from llvm/test/Verifier/test_copy.mir
rename to llvm/test/MachineVerifier/test_copy.mir

diff --git a/llvm/test/Verifier/test_copy_mismatch_types.mir b/llvm/test/MachineVerifier/test_copy_mismatch_types.mir
similarity index 100%
rename from llvm/test/Verifier/test_copy_mismatch_types.mir
rename to llvm/test/MachineVerifier/test_copy_mismatch_types.mir

diff --git a/llvm/test/Verifier/test_g_add.mir b/llvm/test/MachineVerifier/test_g_add.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_add.mir
rename to llvm/test/MachineVerifier/test_g_add.mir

diff --git a/llvm/test/Verifier/test_g_addrspacecast.mir b/llvm/test/MachineVerifier/test_g_addrspacecast.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_addrspacecast.mir
rename to llvm/test/MachineVerifier/test_g_addrspacecast.mir

diff --git a/llvm/test/Verifier/test_g_bitcast.mir b/llvm/test/MachineVerifier/test_g_bitcast.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_bitcast.mir
rename to llvm/test/MachineVerifier/test_g_bitcast.mir

diff --git a/llvm/test/Verifier/gisel-g_build_vector.mir b/llvm/test/MachineVerifier/test_g_build_vector.mir
similarity index 87%
rename from llvm/test/Verifier/gisel-g_build_vector.mir
rename to llvm/test/MachineVerifier/test_g_build_vector.mir
index a40942e..ad2742c 100644 (file)
--- a/llvm/test/Verifier/gisel-g_build_vector.mir
+++ b/llvm/test/MachineVerifier/test_g_build_vector.mir
@@ -1,9 +1,9 @@
 #RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
-# REQUIRES: global-isel, aarch64-registered-target
+# REQUIRES: aarch64-registered-target
 --- |
   target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
   target triple = "aarch64-unknown-unknown"
-  
+
   define i32 @g_build_vector() {
     ret i32 0
   }
@@ -15,9 +15,9 @@ legalized:       true
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:       
+registers:
   - { id: 0, class: _, preferred-register: '' }
-liveins:         
+liveins:
 body:             |
   bb.0:
     ; CHECK: Bad machine code: G_BUILD_VECTOR src operands total size don't match dest size

diff --git a/llvm/test/Verifier/gisel-g_build_vector_trunc.mir b/llvm/test/MachineVerifier/test_g_build_vector_trunc.mir
similarity index 88%
rename from llvm/test/Verifier/gisel-g_build_vector_trunc.mir
rename to llvm/test/MachineVerifier/test_g_build_vector_trunc.mir
index 3b9b304..d73e37e 100644 (file)
--- a/llvm/test/Verifier/gisel-g_build_vector_trunc.mir
+++ b/llvm/test/MachineVerifier/test_g_build_vector_trunc.mir
@@ -1,9 +1,9 @@
 #RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
-# REQUIRES: global-isel, aarch64-registered-target
+# REQUIRES: aarch64-registered-target
 --- |
   target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
   target triple = "aarch64-unknown-unknown"
-  
+
   define i32 @g_build_vector_trunc() {
     ret i32 0
   }
@@ -15,9 +15,9 @@ legalized:       true
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:       
+registers:
   - { id: 0, class: _, preferred-register: '' }
-liveins:         
+liveins:
 body:             |
   bb.0:
     ; CHECK: Bad machine code: G_BUILD_VECTOR_TRUNC source operand types are not larger than dest elt type

diff --git a/llvm/test/Verifier/gisel-g_concat_vector.mir b/llvm/test/MachineVerifier/test_g_concat_vectors.mir
similarity index 100%
rename from llvm/test/Verifier/gisel-g_concat_vector.mir
rename to llvm/test/MachineVerifier/test_g_concat_vectors.mir

diff --git a/llvm/test/Verifier/test_g_constant.mir b/llvm/test/MachineVerifier/test_g_constant.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_constant.mir
rename to llvm/test/MachineVerifier/test_g_constant.mir

diff --git a/llvm/test/Verifier/test_g_extract.mir b/llvm/test/MachineVerifier/test_g_extract.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_extract.mir
rename to llvm/test/MachineVerifier/test_g_extract.mir

diff --git a/llvm/test/Verifier/test_g_fcmp.mir b/llvm/test/MachineVerifier/test_g_fcmp.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_fcmp.mir
rename to llvm/test/MachineVerifier/test_g_fcmp.mir

diff --git a/llvm/test/Verifier/test_g_fconstant.mir b/llvm/test/MachineVerifier/test_g_fconstant.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_fconstant.mir
rename to llvm/test/MachineVerifier/test_g_fconstant.mir

diff --git a/llvm/test/Verifier/test_g_gep.mir b/llvm/test/MachineVerifier/test_g_gep.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_gep.mir
rename to llvm/test/MachineVerifier/test_g_gep.mir

diff --git a/llvm/test/Verifier/test_g_icmp.mir b/llvm/test/MachineVerifier/test_g_icmp.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_icmp.mir
rename to llvm/test/MachineVerifier/test_g_icmp.mir

diff --git a/llvm/test/Verifier/test_g_inttoptr.mir b/llvm/test/MachineVerifier/test_g_inttoptr.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_inttoptr.mir
rename to llvm/test/MachineVerifier/test_g_inttoptr.mir

diff --git a/llvm/test/Verifier/test_g_load.mir b/llvm/test/MachineVerifier/test_g_load.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_load.mir
rename to llvm/test/MachineVerifier/test_g_load.mir

diff --git a/llvm/test/Verifier/test_g_phi.mir b/llvm/test/MachineVerifier/test_g_phi.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_phi.mir
rename to llvm/test/MachineVerifier/test_g_phi.mir

diff --git a/llvm/test/Verifier/test_g_ptrtoint.mir b/llvm/test/MachineVerifier/test_g_ptrtoint.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_ptrtoint.mir
rename to llvm/test/MachineVerifier/test_g_ptrtoint.mir

diff --git a/llvm/test/Verifier/test_g_select.mir b/llvm/test/MachineVerifier/test_g_select.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_select.mir
rename to llvm/test/MachineVerifier/test_g_select.mir

diff --git a/llvm/test/Verifier/test_g_sextload.mir b/llvm/test/MachineVerifier/test_g_sextload.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_sextload.mir
rename to llvm/test/MachineVerifier/test_g_sextload.mir

diff --git a/llvm/test/Verifier/test_g_store.mir b/llvm/test/MachineVerifier/test_g_store.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_store.mir
rename to llvm/test/MachineVerifier/test_g_store.mir

diff --git a/llvm/test/Verifier/test_g_trunc.mir b/llvm/test/MachineVerifier/test_g_trunc.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_trunc.mir
rename to llvm/test/MachineVerifier/test_g_trunc.mir

diff --git a/llvm/test/Verifier/test_g_zextload.mir b/llvm/test/MachineVerifier/test_g_zextload.mir
similarity index 100%
rename from llvm/test/Verifier/test_g_zextload.mir
rename to llvm/test/MachineVerifier/test_g_zextload.mir

diff --git a/llvm/test/Verifier/test_phis_precede_nonphis.mir b/llvm/test/MachineVerifier/test_phis_precede_nonphis.mir
similarity index 100%
rename from llvm/test/Verifier/test_phis_precede_nonphis.mir
rename to llvm/test/MachineVerifier/test_phis_precede_nonphis.mir

diff --git a/llvm/test/CodeGen/X86/verifier-generic-extend-truncate.mir b/llvm/test/MachineVerifier/verifier-generic-extend-truncate.mir
similarity index 98%
rename from llvm/test/CodeGen/X86/verifier-generic-extend-truncate.mir
rename to llvm/test/MachineVerifier/verifier-generic-extend-truncate.mir
index 28bca88..8390d9b 100644 (file)
--- a/llvm/test/CodeGen/X86/verifier-generic-extend-truncate.mir
+++ b/llvm/test/MachineVerifier/verifier-generic-extend-truncate.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
 
 # CHECK: Bad machine code: Generic extend/truncate can not operate on pointers
 # CHECK-NEXT: - function:    bad_generic_extends_and_truncates

diff --git a/llvm/test/CodeGen/X86/verifier-generic-types-1.mir b/llvm/test/MachineVerifier/verifier-generic-types-1.mir
similarity index 95%
rename from llvm/test/CodeGen/X86/verifier-generic-types-1.mir
rename to llvm/test/MachineVerifier/verifier-generic-types-1.mir
index 61a512d..bc2d258 100644 (file)
--- a/llvm/test/CodeGen/X86/verifier-generic-types-1.mir
+++ b/llvm/test/MachineVerifier/verifier-generic-types-1.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
 
 # CHECK-NOT: Type mismatch
 

diff --git a/llvm/test/CodeGen/X86/verifier-generic-types-2.mir b/llvm/test/MachineVerifier/verifier-generic-types-2.mir
similarity index 96%
rename from llvm/test/CodeGen/X86/verifier-generic-types-2.mir
rename to llvm/test/MachineVerifier/verifier-generic-types-2.mir
index 625c5eb..27a14c2 100644 (file)
--- a/llvm/test/CodeGen/X86/verifier-generic-types-2.mir
+++ b/llvm/test/MachineVerifier/verifier-generic-types-2.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
 
 # CHECK: Bad machine code: Generic instruction is missing a virtual register type
 # CHECK-NEXT: - function:    first_type_of_a_type_index_missing_and_a_mismatch

diff --git a/llvm/test/CodeGen/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir b/llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
similarity index 94%
rename from llvm/test/CodeGen/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir
rename to llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
index 6efd03c..06aad1f 100644 (file)
--- a/llvm/test/CodeGen/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir
+++ b/llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
+# REQUIRES: amdgpu-registered-target
 
 # When the verifier was detecting the invalid liveness for vcc, it would assert when trying to iterate the subregisters of the implicit virtual register use.
 

diff --git a/llvm/test/CodeGen/X86/verifier-phi-fail0.mir b/llvm/test/MachineVerifier/verifier-phi-fail0.mir
similarity index 95%
rename from llvm/test/CodeGen/X86/verifier-phi-fail0.mir
rename to llvm/test/MachineVerifier/verifier-phi-fail0.mir
index bb707e4..3f13aab 100644 (file)
--- a/llvm/test/CodeGen/X86/verifier-phi-fail0.mir
+++ b/llvm/test/MachineVerifier/verifier-phi-fail0.mir
@@ -1,4 +1,6 @@
 # RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
+
 ---
 # CHECK: Bad machine code: PHI operand is not live-out from predecessor
 # CHECK: - function:    func0

diff --git a/llvm/test/CodeGen/X86/verifier-phi.mir b/llvm/test/MachineVerifier/verifier-phi.mir
similarity index 95%
rename from llvm/test/CodeGen/X86/verifier-phi.mir
rename to llvm/test/MachineVerifier/verifier-phi.mir
index 81a4cb0..87f2efc 100644 (file)
--- a/llvm/test/CodeGen/X86/verifier-phi.mir
+++ b/llvm/test/MachineVerifier/verifier-phi.mir
@@ -1,4 +1,6 @@
 # RUN: llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none | FileCheck %s
+# REQUIRES: x86-registered-target
+
 # This should cleanly pass the machine verifier
 ---
 # CHECK-LABEL: name: func0

diff --git a/llvm/test/CodeGen/AMDGPU/verifier-pseudo-terminators.mir b/llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
similarity index 94%
rename from llvm/test/CodeGen/AMDGPU/verifier-pseudo-terminators.mir
rename to llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
index d9e8aa7..b501aac 100644 (file)
--- a/llvm/test/CodeGen/AMDGPU/verifier-pseudo-terminators.mir
+++ b/llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
@@ -1,4 +1,6 @@
 # RUN: not llc -march=amdgcn -run-pass=verify %s 2>&1 | FileCheck %s
+# REQUIRES: amdgpu-registered-target
+
 # Make sure that mismatched successors are caught when a _term
 # instruction is used
 

diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir b/llvm/test/MachineVerifier/verify-regbankselected.mir
similarity index 93%
rename from llvm/test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir
rename to llvm/test/MachineVerifier/verify-regbankselected.mir
index c558693..027fc66 100644 (file)
--- a/llvm/test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir
+++ b/llvm/test/MachineVerifier/verify-regbankselected.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# REQUIRES: aarch64-registered-target
 
 --- |
 

diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/verify-selected.mir b/llvm/test/MachineVerifier/verify-selected.mir
similarity index 95%
rename from llvm/test/CodeGen/AArch64/GlobalISel/verify-selected.mir
rename to llvm/test/MachineVerifier/verify-selected.mir
index ad17fa9..a38f67c 100644 (file)
--- a/llvm/test/CodeGen/AArch64/GlobalISel/verify-selected.mir
+++ b/llvm/test/MachineVerifier/verify-selected.mir
@@ -1,4 +1,5 @@
 # RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# REQUIRES: aarch64-registered-target
 
 --- |