Merge patch series "RISC-V: Fixes for riscv_has_extension[un]likely()'s alternative...

Conor Dooley <conor.dooley@microchip.com> says:

Here's my attempt at fixing both the use of an FPU on XIP kernels and
the issue that Jason ran into where CONFIG_FPU, which needs the
alternatives frame work for has_fpu() checks, could be enabled without
the alternatives actually being present.

For the former, a "slow" fallback that does not use alternatives is
added to riscv_has_extension_[un]likely() that can be used with XIP.
Obviously, we want to make use of Jisheng's alternatives based approach
where possible, so any users of riscv_has_extension_[un]likely() will
want to make sure that they select RISCV_ALTERNATIVE.
If they don't however, they'll hit the fallback path which (should,
sparing a silly mistake from me!) behave in the same way, thus
succeeding silently. Sounds like a

To prevent "depends on !XIP_KERNEL; select RISCV_ALTERNATIVE" spreading
like the plague through the various places that want to check for the
presence of extensions, and sidestep the potential silent "success"
mentioned above, all users RISCV_ALTERNATIVE are converted from selects
to dependencies, with the option being selected for all !XIP_KERNEL
builds.

I know that the VDSO was a key place that Jisheng wanted to use the new
helper rather than static branches, and I think the fallback path
should not cause issues there.

See the thread at [1] for the prior discussion.

1 - https://lore.kernel.org/linux-riscv/20230128172856.3814-1-jszhang@kernel.org/T/#m21390d570997145d31dd8bb95002fd61f99c6573

[Palmer: merging in the fixes as a branch as there's some features that
depend on it.]

* b4-shazam-merge:
  RISC-V: always select RISCV_ALTERNATIVE for non-xip kernels
  RISC-V: add non-alternative fallback for riscv_has_extension_[un]likely()

Link: https://lore.kernel.org/r/20230324100538.3514663-1-conor.dooley@microchip.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

diff --combined arch/riscv/Kconfig
index 5b182d1,2f69764..eb7f29a
--- 1/arch/riscv/Kconfig
--- 2/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@@ -126,6 -126,7 +126,7 @@@ config RISC
        select OF_IRQ
        select PCI_DOMAINS_GENERIC if PCI
        select PCI_MSI if PCI
+       select RISCV_ALTERNATIVE if !XIP_KERNEL
        select RISCV_INTC
        select RISCV_TIMER if RISCV_SBI
        select SIFIVE_PLIC
@@@ -401,9 -402,8 +402,8 @@@ config RISCV_ISA_
  config RISCV_ISA_SVPBMT
        bool "SVPBMT extension support"
        depends on 64BIT && MMU
-       depends on !XIP_KERNEL
+       depends on RISCV_ALTERNATIVE
        default y
-       select RISCV_ALTERNATIVE
        help
           Adds support to dynamically detect the presence of the SVPBMT
           ISA-extension (Supervisor-mode: page-based memory types) and
@@@ -428,8 -428,8 +428,8 @@@ config TOOLCHAIN_HAS_ZB
  config RISCV_ISA_ZBB
        bool "Zbb extension support for bit manipulation instructions"
        depends on TOOLCHAIN_HAS_ZBB
-       depends on !XIP_KERNEL && MMU
-       select RISCV_ALTERNATIVE
+       depends on MMU
+       depends on RISCV_ALTERNATIVE
        default y
        help
           Adds support to dynamically detect the presence of the ZBB
@@@ -443,9 -443,9 +443,9 @@@
  
  config RISCV_ISA_ZICBOM
        bool "Zicbom extension support for non-coherent DMA operation"
-       depends on !XIP_KERNEL && MMU
+       depends on MMU
+       depends on RISCV_ALTERNATIVE
        default y
-       select RISCV_ALTERNATIVE
        select RISCV_DMA_NONCOHERENT
        help
           Adds support to dynamically detect the presence of the ZICBOM
@@@ -464,28 -464,6 +464,28 @@@ config TOOLCHAIN_HAS_ZIHINTPAUS
        depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zihintpause)
        depends on LLD_VERSION >= 150000 || LD_VERSION >= 23600
  
 +config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI
 +      def_bool y
 +      # https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc
 +      depends on AS_IS_GNU && AS_VERSION >= 23800
 +      help
 +        Newer binutils versions default to ISA spec version 20191213 which
 +        moves some instructions from the I extension to the Zicsr and Zifencei
 +        extensions.
 +
 +config TOOLCHAIN_NEEDS_OLD_ISA_SPEC
 +      def_bool y
 +      depends on TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI
 +      # https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16
 +      depends on CC_IS_CLANG && CLANG_VERSION < 170000
 +      help
 +        Certain versions of clang do not support zicsr and zifencei via -march
 +        but newer versions of binutils require it for the reasons noted in the
 +        help text of CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI. This
 +        option causes an older ISA spec compatible with these older versions
 +        of clang to be passed to GAS, which has the same result as passing zicsr
 +        and zifencei to -march.
 +
  config FPU
        bool "FPU support"
        default y