drm/amdgpu: increase MAX setting to hold more jpeg instances
authorJames Zhu <James.Zhu@amd.com>
Mon, 12 Dec 2022 17:29:04 +0000 (12:29 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 13:51:19 +0000 (09:51 -0400)
vcn_v4_0_3 increased jpeg instances,
need increasing MAX resources setting accordlingly.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

index a29a018..3c3ae2b 100644 (file)
@@ -325,14 +325,14 @@ typedef enum _AMDGPU_DOORBELL_ASSIGNMENT_LAYOUT1
        AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_END         = 0x19F,
        /* IH: 0x1A0 ~ 0x1AF */
        AMDGPU_DOORBELL_LAYOUT1_IH                      = 0x1A0,
-       /* VCN: 0x1B0 ~ 0x1C2 */
+       /* VCN: 0x1B0 ~ 0x1D4 */
        AMDGPU_DOORBELL_LAYOUT1_VCN_START               = 0x1B0,
-       AMDGPU_DOORBELL_LAYOUT1_VCN_END                 = 0x1C2,
+       AMDGPU_DOORBELL_LAYOUT1_VCN_END                 = 0x1D4,
 
        AMDGPU_DOORBELL_LAYOUT1_FIRST_NON_CP            = AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_START,
        AMDGPU_DOORBELL_LAYOUT1_LAST_NON_CP             = AMDGPU_DOORBELL_LAYOUT1_VCN_END,
 
-       AMDGPU_DOORBELL_LAYOUT1_MAX_ASSIGNMENT          = 0x1C2,
+       AMDGPU_DOORBELL_LAYOUT1_MAX_ASSIGNMENT          = 0x1D4,
        AMDGPU_DOORBELL_LAYOUT1_INVALID                 = 0xFFFF
 } AMDGPU_DOORBELL_ASSIGNMENT_LAYOUT1;
 
index 5c200a5..bb700a2 100644 (file)
@@ -26,7 +26,7 @@
 
 #include "amdgpu_ras.h"
 
-#define AMDGPU_MAX_JPEG_INSTANCES      2
+#define AMDGPU_MAX_JPEG_INSTANCES      4
 #define AMDGPU_MAX_JPEG_RINGS          8
 
 #define AMDGPU_JPEG_HARVEST_JPEG0 (1 << 0)
index 8f4b416..bed118d 100644 (file)
@@ -37,7 +37,7 @@ struct amdgpu_job;
 struct amdgpu_vm;
 
 /* max number of rings */
-#define AMDGPU_MAX_RINGS               96
+#define AMDGPU_MAX_RINGS               102
 #define AMDGPU_MAX_HWIP_RINGS          32
 #define AMDGPU_MAX_GFX_RINGS           2
 #define AMDGPU_MAX_SW_GFX_RINGS         2