VIGS: use write-combine caching for video memory

x86 PAT + write-combine should improve performance when
mmaped gems are directly accessed by CPU.

Change-Id: I4fcb41c207161f87a3f3d9ee60f773675c5f028d
Signed-off-by: Vasiliy Ulyanov <v.ulyanov@samsung.com>
(cherry picked from commit d89f3c6e059c6f51a5dd9945f2fb58b1fdff76c2)

diff --git a/drivers/gpu/drm/vigs/vigs_fbdev.c b/drivers/gpu/drm/vigs/vigs_fbdev.c
index 6447667..20d1a8f 100644 (file)
--- a/drivers/gpu/drm/vigs/vigs_fbdev.c
+++ b/drivers/gpu/drm/vigs/vigs_fbdev.c
@@ -390,8 +390,8 @@ static int vigs_fbdev_probe_once(struct drm_fb_helper *helper,
      * one will attempt to write to /dev/fb0 then he'll probably
      * write to some GEM's memory, but we don't care.
      */
-    vigs_fbdev->kptr = ioremap(vigs_dev->vram_base,
-                               vigs_gem_size(&fb_sfc->gem));
+    vigs_fbdev->kptr = ioremap_wc(vigs_dev->vram_base,
+                                  vigs_gem_size(&fb_sfc->gem));
 
     if (!vigs_fbdev->kptr) {
         goto fail4;

diff --git a/drivers/gpu/drm/vigs/vigs_gem.c b/drivers/gpu/drm/vigs/vigs_gem.c
index 13bf3cf..1dfc1dd 100644 (file)
--- a/drivers/gpu/drm/vigs/vigs_gem.c
+++ b/drivers/gpu/drm/vigs/vigs_gem.c
@@ -42,7 +42,7 @@ int vigs_gem_init(struct vigs_gem_object *vigs_gem,
             TTM_PL_FLAG_CACHED | TTM_PL_FLAG_TT | TTM_PL_FLAG_NO_EVICT;
     } else if (type == VIGS_GEM_TYPE_EXECBUFFER) {
         placements[0] =
-            TTM_PL_FLAG_CACHED | TTM_PL_FLAG_PRIV0 | TTM_PL_FLAG_NO_EVICT;
+            TTM_PL_FLAG_WC | TTM_PL_FLAG_PRIV0 | TTM_PL_FLAG_NO_EVICT;
     } else {
         kfree(vigs_gem);
         return -EINVAL;
@@ -118,7 +118,7 @@ int vigs_gem_pin(struct vigs_gem_object *vigs_gem)
     }
 
     placements[0] =
-        TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM | TTM_PL_FLAG_NO_EVICT;
+        TTM_PL_FLAG_WC | TTM_PL_FLAG_VRAM | TTM_PL_FLAG_NO_EVICT;
 
     memset(&placement, 0, sizeof(placement));
 
@@ -166,7 +166,7 @@ void vigs_gem_unpin(struct vigs_gem_object *vigs_gem)
     vigs_gem_kunmap(vigs_gem);
 
     placements[0] =
-        TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM;
+        TTM_PL_FLAG_WC | TTM_PL_FLAG_VRAM;
     placements[1] =
         TTM_PL_FLAG_CACHED | TTM_PL_FLAG_TT | TTM_PL_FLAG_NO_EVICT;
 

diff --git a/drivers/gpu/drm/vigs/vigs_mman.c b/drivers/gpu/drm/vigs/vigs_mman.c
index c56266d..b1790a1 100644 (file)
--- a/drivers/gpu/drm/vigs/vigs_mman.c
+++ b/drivers/gpu/drm/vigs/vigs_mman.c
@@ -194,7 +194,7 @@ static int vigs_ttm_init_mem_type(struct ttm_bo_device *bo_dev,
         man->flags = TTM_MEMTYPE_FLAG_FIXED |
                      TTM_MEMTYPE_FLAG_MAPPABLE;
         man->available_caching = TTM_PL_MASK_CACHING;
-        man->default_caching = TTM_PL_FLAG_CACHED;
+        man->default_caching = TTM_PL_FLAG_WC;
         break;
     default:
         DRM_ERROR("unsupported memory type: %u\n", (unsigned)type);
@@ -316,7 +316,7 @@ static int vigs_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
      * It's GPU memory page fault. Move this buffer into VRAM.
      */
 
-    placements[0] = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM;
+    placements[0] = TTM_PL_FLAG_WC | TTM_PL_FLAG_VRAM;
 
     memset(&placement, 0, sizeof(placement));