i965: Move assign_common_binding_table_offsets to brw_program

This isn't used by Vulkan and is specific to the way the GL driver
works.  There's no reason to have it in common compiler code.  Also, it
relies on BRW_MAX_* defines which are defined in brw_context.h

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index 1d36b4b..dd90a3a 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -683,3 +683,90 @@ brw_setup_tex_for_precompile(struct brw_context *brw,
       }
    }
 }
+
+/**
+ * Sets up the starting offsets for the groups of binding table entries
+ * common to all pipeline stages.
+ *
+ * Unused groups are initialized to 0xd0d0d0d0 to make it obvious that they're
+ * unused but also make sure that addition of small offsets to them will
+ * trigger some of our asserts that surface indices are < BRW_MAX_SURFACES.
+ */
+uint32_t
+brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
+                                        const struct gl_program *prog,
+                                        struct brw_stage_prog_data *stage_prog_data,
+                                        uint32_t next_binding_table_offset)
+{
+   int num_textures = util_last_bit(prog->SamplersUsed);
+
+   stage_prog_data->binding_table.texture_start = next_binding_table_offset;
+   next_binding_table_offset += num_textures;
+
+   if (prog->info.num_ubos) {
+      assert(prog->info.num_ubos <= BRW_MAX_UBO);
+      stage_prog_data->binding_table.ubo_start = next_binding_table_offset;
+      next_binding_table_offset += prog->info.num_ubos;
+   } else {
+      stage_prog_data->binding_table.ubo_start = 0xd0d0d0d0;
+   }
+
+   if (prog->info.num_ssbos) {
+      assert(prog->info.num_ssbos <= BRW_MAX_SSBO);
+      stage_prog_data->binding_table.ssbo_start = next_binding_table_offset;
+      next_binding_table_offset += prog->info.num_ssbos;
+   } else {
+      stage_prog_data->binding_table.ssbo_start = 0xd0d0d0d0;
+   }
+
+   if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
+      stage_prog_data->binding_table.shader_time_start = next_binding_table_offset;
+      next_binding_table_offset++;
+   } else {
+      stage_prog_data->binding_table.shader_time_start = 0xd0d0d0d0;
+   }
+
+   if (prog->nir->info->uses_texture_gather) {
+      if (devinfo->gen >= 8) {
+         stage_prog_data->binding_table.gather_texture_start =
+            stage_prog_data->binding_table.texture_start;
+      } else {
+         stage_prog_data->binding_table.gather_texture_start = next_binding_table_offset;
+         next_binding_table_offset += num_textures;
+      }
+   } else {
+      stage_prog_data->binding_table.gather_texture_start = 0xd0d0d0d0;
+   }
+
+   if (prog->info.num_abos) {
+      stage_prog_data->binding_table.abo_start = next_binding_table_offset;
+      next_binding_table_offset += prog->info.num_abos;
+   } else {
+      stage_prog_data->binding_table.abo_start = 0xd0d0d0d0;
+   }
+
+   if (prog->info.num_images) {
+      stage_prog_data->binding_table.image_start = next_binding_table_offset;
+      next_binding_table_offset += prog->info.num_images;
+   } else {
+      stage_prog_data->binding_table.image_start = 0xd0d0d0d0;
+   }
+
+   /* This may or may not be used depending on how the compile goes. */
+   stage_prog_data->binding_table.pull_constants_start = next_binding_table_offset;
+   next_binding_table_offset++;
+
+   /* Plane 0 is just the regular texture section */
+   stage_prog_data->binding_table.plane_start[0] = stage_prog_data->binding_table.texture_start;
+
+   stage_prog_data->binding_table.plane_start[1] = next_binding_table_offset;
+   next_binding_table_offset += num_textures;
+
+   stage_prog_data->binding_table.plane_start[2] = next_binding_table_offset;
+   next_binding_table_offset += num_textures;
+
+   /* prog_data->base.binding_table.size will be set by brw_mark_surface_used. */
+
+   assert(next_binding_table_offset <= BRW_MAX_SURFACES);
+   return next_binding_table_offset;
+}

diff --git a/src/mesa/drivers/dri/i965/brw_program.h b/src/mesa/drivers/dri/i965/brw_program.h
index 55b9e54..6903ccd 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_program.h
+++ b/src/mesa/drivers/dri/i965/brw_program.h
@@ -48,6 +48,13 @@ void brw_populate_sampler_prog_key_data(struct gl_context *ctx,
 bool brw_debug_recompile_sampler_key(struct brw_context *brw,
                                      const struct brw_sampler_prog_key_data *old_key,
                                      const struct brw_sampler_prog_key_data *key);
+
+uint32_t
+brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
+                                        const struct gl_program *prog,
+                                        struct brw_stage_prog_data *stage_prog_data,
+                                        uint32_t next_binding_table_offset);
+
 void
 brw_mark_surface_used(struct brw_stage_prog_data *prog_data,
                       unsigned surf_index);

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 738f8f4..02aa0b2 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -1147,93 +1147,6 @@ backend_shader::calculate_cfg()
    cfg = new(mem_ctx) cfg_t(&this->instructions);
 }
 
-/**
- * Sets up the starting offsets for the groups of binding table entries
- * commong to all pipeline stages.
- *
- * Unused groups are initialized to 0xd0d0d0d0 to make it obvious that they're
- * unused but also make sure that addition of small offsets to them will
- * trigger some of our asserts that surface indices are < BRW_MAX_SURFACES.
- */
-uint32_t
-brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
-                                        const struct gl_program *prog,
-                                        struct brw_stage_prog_data *stage_prog_data,
-                                        uint32_t next_binding_table_offset)
-{
-   int num_textures = util_last_bit(prog->SamplersUsed);
-
-   stage_prog_data->binding_table.texture_start = next_binding_table_offset;
-   next_binding_table_offset += num_textures;
-
-   if (prog->info.num_ubos) {
-      assert(prog->info.num_ubos <= BRW_MAX_UBO);
-      stage_prog_data->binding_table.ubo_start = next_binding_table_offset;
-      next_binding_table_offset += prog->info.num_ubos;
-   } else {
-      stage_prog_data->binding_table.ubo_start = 0xd0d0d0d0;
-   }
-
-   if (prog->info.num_ssbos) {
-      assert(prog->info.num_ssbos <= BRW_MAX_SSBO);
-      stage_prog_data->binding_table.ssbo_start = next_binding_table_offset;
-      next_binding_table_offset += prog->info.num_ssbos;
-   } else {
-      stage_prog_data->binding_table.ssbo_start = 0xd0d0d0d0;
-   }
-
-   if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
-      stage_prog_data->binding_table.shader_time_start = next_binding_table_offset;
-      next_binding_table_offset++;
-   } else {
-      stage_prog_data->binding_table.shader_time_start = 0xd0d0d0d0;
-   }
-
-   if (prog->nir->info->uses_texture_gather) {
-      if (devinfo->gen >= 8) {
-         stage_prog_data->binding_table.gather_texture_start =
-            stage_prog_data->binding_table.texture_start;
-      } else {
-         stage_prog_data->binding_table.gather_texture_start = next_binding_table_offset;
-         next_binding_table_offset += num_textures;
-      }
-   } else {
-      stage_prog_data->binding_table.gather_texture_start = 0xd0d0d0d0;
-   }
-
-   if (prog->info.num_abos) {
-      stage_prog_data->binding_table.abo_start = next_binding_table_offset;
-      next_binding_table_offset += prog->info.num_abos;
-   } else {
-      stage_prog_data->binding_table.abo_start = 0xd0d0d0d0;
-   }
-
-   if (prog->info.num_images) {
-      stage_prog_data->binding_table.image_start = next_binding_table_offset;
-      next_binding_table_offset += prog->info.num_images;
-   } else {
-      stage_prog_data->binding_table.image_start = 0xd0d0d0d0;
-   }
-
-   /* This may or may not be used depending on how the compile goes. */
-   stage_prog_data->binding_table.pull_constants_start = next_binding_table_offset;
-   next_binding_table_offset++;
-
-   /* Plane 0 is just the regular texture section */
-   stage_prog_data->binding_table.plane_start[0] = stage_prog_data->binding_table.texture_start;
-
-   stage_prog_data->binding_table.plane_start[1] = next_binding_table_offset;
-   next_binding_table_offset += num_textures;
-
-   stage_prog_data->binding_table.plane_start[2] = next_binding_table_offset;
-   next_binding_table_offset += num_textures;
-
-   /* prog_data->base.binding_table.size will be set by brw_mark_surface_used. */
-
-   assert(next_binding_table_offset <= BRW_MAX_SURFACES);
-   return next_binding_table_offset;
-}
-
 static void
 setup_vec4_uniform_value(const gl_constant_value **params,
                          const gl_constant_value *values,

diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 2ec70b4..da2d28e 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -287,12 +287,6 @@ struct brw_gs_compile
    unsigned control_data_header_size_bits;
 };
 
-uint32_t
-brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
-                                        const struct gl_program *prog,
-                                        struct brw_stage_prog_data *stage_prog_data,
-                                        uint32_t next_binding_table_offset);
-
 bool brw_vs_precompile(struct gl_context *ctx, struct gl_program *prog);
 bool brw_tcs_precompile(struct gl_context *ctx,
                         struct gl_shader_program *shader_prog,