R600 -> AMDGPU rename
authorTom Stellard <thomas.stellard@amd.com>
Sat, 13 Jun 2015 03:28:10 +0000 (03:28 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Sat, 13 Jun 2015 03:28:10 +0000 (03:28 +0000)
llvm-svn: 239657

552 files changed:
llvm/CMakeLists.txt
llvm/autoconf/configure.ac
llvm/configure
llvm/docs/AMDGPUUsage.rst [moved from llvm/docs/R600Usage.rst with 91% similarity]
llvm/docs/CompilerWriterInfo.rst
llvm/docs/GettingStarted.rst
llvm/docs/index.rst
llvm/lib/Target/AMDGPU/AMDGPU.h [moved from llvm/lib/Target/R600/AMDGPU.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPU.td [moved from llvm/lib/Target/R600/AMDGPU.td with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp [moved from llvm/lib/Target/R600/AMDGPUAlwaysInlinePass.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp [moved from llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp with 99% similarity]
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h [moved from llvm/lib/Target/R600/AMDGPUAsmPrinter.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td [moved from llvm/lib/Target/R600/AMDGPUCallingConv.td with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp [moved from llvm/lib/Target/R600/AMDGPUFrameLowering.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h [moved from llvm/lib/Target/R600/AMDGPUFrameLowering.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp [moved from llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp [moved from llvm/lib/Target/R600/AMDGPUISelLowering.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h [moved from llvm/lib/Target/R600/AMDGPUISelLowering.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp [moved from llvm/lib/Target/R600/AMDGPUInstrInfo.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h [moved from llvm/lib/Target/R600/AMDGPUInstrInfo.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td [moved from llvm/lib/Target/R600/AMDGPUInstrInfo.td with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUInstructions.td [moved from llvm/lib/Target/R600/AMDGPUInstructions.td with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUIntrinsicInfo.cpp [moved from llvm/lib/Target/R600/AMDGPUIntrinsicInfo.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUIntrinsicInfo.h [moved from llvm/lib/Target/R600/AMDGPUIntrinsicInfo.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td [moved from llvm/lib/Target/R600/AMDGPUIntrinsics.td with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp [moved from llvm/lib/Target/R600/AMDGPUMCInstLower.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.h [moved from llvm/lib/Target/R600/AMDGPUMCInstLower.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp [moved from llvm/lib/Target/R600/AMDGPUMachineFunction.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h [moved from llvm/lib/Target/R600/AMDGPUMachineFunction.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp [moved from llvm/lib/Target/R600/AMDGPUPromoteAlloca.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp [moved from llvm/lib/Target/R600/AMDGPURegisterInfo.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.h [moved from llvm/lib/Target/R600/AMDGPURegisterInfo.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.td [moved from llvm/lib/Target/R600/AMDGPURegisterInfo.td with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp [moved from llvm/lib/Target/R600/AMDGPUSubtarget.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h [moved from llvm/lib/Target/R600/AMDGPUSubtarget.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp [moved from llvm/lib/Target/R600/AMDGPUTargetMachine.cpp with 99% similarity]
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h [moved from llvm/lib/Target/R600/AMDGPUTargetMachine.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp [moved from llvm/lib/Target/R600/AMDGPUTargetTransformInfo.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h [moved from llvm/lib/Target/R600/AMDGPUTargetTransformInfo.h with 100% similarity]
llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp [moved from llvm/lib/Target/R600/AMDILCFGStructurizer.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/AMDKernelCodeT.h [moved from llvm/lib/Target/R600/AMDKernelCodeT.h with 100% similarity]
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp [moved from llvm/lib/Target/R600/AsmParser/AMDGPUAsmParser.cpp with 99% similarity]
llvm/lib/Target/AMDGPU/AsmParser/CMakeLists.txt [new file with mode: 0644]
llvm/lib/Target/AMDGPU/AsmParser/LLVMBuild.txt [moved from llvm/lib/Target/R600/AsmParser/LLVMBuild.txt with 72% similarity]
llvm/lib/Target/AMDGPU/AsmParser/Makefile [moved from llvm/lib/Target/R600/AsmParser/Makefile with 100% similarity]
llvm/lib/Target/AMDGPU/CIInstructions.td [moved from llvm/lib/Target/R600/CIInstructions.td with 100% similarity]
llvm/lib/Target/AMDGPU/CMakeLists.txt [moved from llvm/lib/Target/R600/CMakeLists.txt with 98% similarity]
llvm/lib/Target/AMDGPU/CaymanInstructions.td [moved from llvm/lib/Target/R600/CaymanInstructions.td with 100% similarity]
llvm/lib/Target/AMDGPU/EvergreenInstructions.td [moved from llvm/lib/Target/R600/EvergreenInstructions.td with 100% similarity]
llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp [moved from llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h [moved from llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.h with 100% similarity]
llvm/lib/Target/AMDGPU/InstPrinter/CMakeLists.txt [new file with mode: 0644]
llvm/lib/Target/AMDGPU/InstPrinter/LLVMBuild.txt [moved from llvm/lib/Target/R600/InstPrinter/LLVMBuild.txt with 79% similarity]
llvm/lib/Target/AMDGPU/InstPrinter/Makefile [moved from llvm/lib/Target/R600/InstPrinter/Makefile with 100% similarity]
llvm/lib/Target/AMDGPU/LLVMBuild.txt [moved from llvm/lib/Target/R600/LLVMBuild.txt with 76% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp [moved from llvm/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp [moved from llvm/lib/Target/R600/MCTargetDesc/AMDGPUELFObjectWriter.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUFixupKinds.h [moved from llvm/lib/Target/R600/MCTargetDesc/AMDGPUFixupKinds.h with 100% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp [moved from llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h [moved from llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCAsmInfo.h with 100% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp [moved from llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h [moved from llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h with 100% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp [moved from llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp with 98% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h [moved from llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h with 100% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt [moved from llvm/lib/Target/R600/MCTargetDesc/CMakeLists.txt with 84% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/LLVMBuild.txt [moved from llvm/lib/Target/R600/MCTargetDesc/LLVMBuild.txt with 72% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/Makefile [moved from llvm/lib/Target/R600/MCTargetDesc/Makefile with 100% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp [moved from llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp [moved from llvm/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/Makefile [moved from llvm/lib/Target/R600/Makefile with 100% similarity]
llvm/lib/Target/AMDGPU/Processors.td [moved from llvm/lib/Target/R600/Processors.td with 100% similarity]
llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp [moved from llvm/lib/Target/R600/R600ClauseMergePass.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp [moved from llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R600Defines.h [moved from llvm/lib/Target/R600/R600Defines.h with 100% similarity]
llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp [moved from llvm/lib/Target/R600/R600EmitClauseMarkers.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp [moved from llvm/lib/Target/R600/R600ExpandSpecialInstrs.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R600ISelLowering.cpp [moved from llvm/lib/Target/R600/R600ISelLowering.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R600ISelLowering.h [moved from llvm/lib/Target/R600/R600ISelLowering.h with 100% similarity]
llvm/lib/Target/AMDGPU/R600InstrFormats.td [moved from llvm/lib/Target/R600/R600InstrFormats.td with 100% similarity]
llvm/lib/Target/AMDGPU/R600InstrInfo.cpp [moved from llvm/lib/Target/R600/R600InstrInfo.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R600InstrInfo.h [moved from llvm/lib/Target/R600/R600InstrInfo.h with 100% similarity]
llvm/lib/Target/AMDGPU/R600Instructions.td [moved from llvm/lib/Target/R600/R600Instructions.td with 100% similarity]
llvm/lib/Target/AMDGPU/R600Intrinsics.td [moved from llvm/lib/Target/R600/R600Intrinsics.td with 100% similarity]
llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.cpp [moved from llvm/lib/Target/R600/R600MachineFunctionInfo.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.h [moved from llvm/lib/Target/R600/R600MachineFunctionInfo.h with 100% similarity]
llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp [moved from llvm/lib/Target/R600/R600MachineScheduler.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R600MachineScheduler.h [moved from llvm/lib/Target/R600/R600MachineScheduler.h with 100% similarity]
llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp [moved from llvm/lib/Target/R600/R600OptimizeVectorRegisters.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R600Packetizer.cpp [moved from llvm/lib/Target/R600/R600Packetizer.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp [moved from llvm/lib/Target/R600/R600RegisterInfo.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R600RegisterInfo.h [moved from llvm/lib/Target/R600/R600RegisterInfo.h with 100% similarity]
llvm/lib/Target/AMDGPU/R600RegisterInfo.td [moved from llvm/lib/Target/R600/R600RegisterInfo.td with 100% similarity]
llvm/lib/Target/AMDGPU/R600Schedule.td [moved from llvm/lib/Target/R600/R600Schedule.td with 100% similarity]
llvm/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp [moved from llvm/lib/Target/R600/R600TextureIntrinsicsReplacer.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/R700Instructions.td [moved from llvm/lib/Target/R600/R700Instructions.td with 100% similarity]
llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp [moved from llvm/lib/Target/R600/SIAnnotateControlFlow.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIDefines.h [moved from llvm/lib/Target/R600/SIDefines.h with 100% similarity]
llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp [moved from llvm/lib/Target/R600/SIFixControlFlowLiveIntervals.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp [moved from llvm/lib/Target/R600/SIFixSGPRCopies.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp [moved from llvm/lib/Target/R600/SIFixSGPRLiveRanges.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp [moved from llvm/lib/Target/R600/SIFoldOperands.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIISelLowering.cpp [moved from llvm/lib/Target/R600/SIISelLowering.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIISelLowering.h [moved from llvm/lib/Target/R600/SIISelLowering.h with 100% similarity]
llvm/lib/Target/AMDGPU/SIInsertWaits.cpp [moved from llvm/lib/Target/R600/SIInsertWaits.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIInstrFormats.td [moved from llvm/lib/Target/R600/SIInstrFormats.td with 100% similarity]
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp [moved from llvm/lib/Target/R600/SIInstrInfo.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIInstrInfo.h [moved from llvm/lib/Target/R600/SIInstrInfo.h with 100% similarity]
llvm/lib/Target/AMDGPU/SIInstrInfo.td [moved from llvm/lib/Target/R600/SIInstrInfo.td with 100% similarity]
llvm/lib/Target/AMDGPU/SIInstructions.td [moved from llvm/lib/Target/R600/SIInstructions.td with 100% similarity]
llvm/lib/Target/AMDGPU/SIIntrinsics.td [moved from llvm/lib/Target/R600/SIIntrinsics.td with 100% similarity]
llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp [moved from llvm/lib/Target/R600/SILoadStoreOptimizer.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp [moved from llvm/lib/Target/R600/SILowerControlFlow.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp [moved from llvm/lib/Target/R600/SILowerI1Copies.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp [moved from llvm/lib/Target/R600/SIMachineFunctionInfo.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h [moved from llvm/lib/Target/R600/SIMachineFunctionInfo.h with 100% similarity]
llvm/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp [moved from llvm/lib/Target/R600/SIPrepareScratchRegs.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp [moved from llvm/lib/Target/R600/SIRegisterInfo.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SIRegisterInfo.h [moved from llvm/lib/Target/R600/SIRegisterInfo.h with 100% similarity]
llvm/lib/Target/AMDGPU/SIRegisterInfo.td [moved from llvm/lib/Target/R600/SIRegisterInfo.td with 100% similarity]
llvm/lib/Target/AMDGPU/SISchedule.td [moved from llvm/lib/Target/R600/SISchedule.td with 100% similarity]
llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp [moved from llvm/lib/Target/R600/SIShrinkInstructions.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/SITypeRewriter.cpp [moved from llvm/lib/Target/R600/SITypeRewriter.cpp with 100% similarity]
llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp [moved from llvm/lib/Target/R600/TargetInfo/AMDGPUTargetInfo.cpp with 95% similarity]
llvm/lib/Target/AMDGPU/TargetInfo/CMakeLists.txt [new file with mode: 0644]
llvm/lib/Target/AMDGPU/TargetInfo/LLVMBuild.txt [moved from llvm/lib/Target/R600/TargetInfo/LLVMBuild.txt with 79% similarity]
llvm/lib/Target/AMDGPU/TargetInfo/Makefile [moved from llvm/lib/Target/R600/TargetInfo/Makefile with 100% similarity]
llvm/lib/Target/AMDGPU/VIInstrFormats.td [moved from llvm/lib/Target/R600/VIInstrFormats.td with 100% similarity]
llvm/lib/Target/AMDGPU/VIInstructions.td [moved from llvm/lib/Target/R600/VIInstructions.td with 100% similarity]
llvm/lib/Target/LLVMBuild.txt
llvm/lib/Target/R600/AsmParser/CMakeLists.txt [deleted file]
llvm/lib/Target/R600/InstPrinter/CMakeLists.txt [deleted file]
llvm/lib/Target/R600/TargetInfo/CMakeLists.txt [deleted file]
llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll [moved from llvm/test/CodeGen/R600/32-bit-local-address-space.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/README [moved from llvm/test/CodeGen/R600/README with 100% similarity]
llvm/test/CodeGen/AMDGPU/add-debug.ll [moved from llvm/test/CodeGen/R600/add-debug.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/add.ll [moved from llvm/test/CodeGen/R600/add.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/add_i64.ll [moved from llvm/test/CodeGen/R600/add_i64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/address-space.ll [moved from llvm/test/CodeGen/R600/address-space.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/and.ll [moved from llvm/test/CodeGen/R600/and.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/anyext.ll [moved from llvm/test/CodeGen/R600/anyext.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll [moved from llvm/test/CodeGen/R600/array-ptr-calc-i32.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll [moved from llvm/test/CodeGen/R600/array-ptr-calc-i64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll [moved from llvm/test/CodeGen/R600/atomic_cmp_swap_local.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/atomic_load_add.ll [moved from llvm/test/CodeGen/R600/atomic_load_add.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll [moved from llvm/test/CodeGen/R600/atomic_load_sub.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/basic-branch.ll [moved from llvm/test/CodeGen/R600/basic-branch.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/basic-loop.ll [moved from llvm/test/CodeGen/R600/basic-loop.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/bfe_uint.ll [moved from llvm/test/CodeGen/R600/bfe_uint.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/bfi_int.ll [moved from llvm/test/CodeGen/R600/bfi_int.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/big_alu.ll [moved from llvm/test/CodeGen/R600/big_alu.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/bitcast.ll [moved from llvm/test/CodeGen/R600/bitcast.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/bswap.ll [moved from llvm/test/CodeGen/R600/bswap.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/build_vector.ll [moved from llvm/test/CodeGen/R600/build_vector.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/call.ll [moved from llvm/test/CodeGen/R600/call.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/call_fs.ll [moved from llvm/test/CodeGen/R600/call_fs.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/cayman-loop-bug.ll [moved from llvm/test/CodeGen/R600/cayman-loop-bug.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/cf-stack-bug.ll [moved from llvm/test/CodeGen/R600/cf-stack-bug.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/cf_end.ll [moved from llvm/test/CodeGen/R600/cf_end.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll [moved from llvm/test/CodeGen/R600/cgp-addressing-modes.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/coalescer_remat.ll [moved from llvm/test/CodeGen/R600/coalescer_remat.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll [moved from llvm/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/combine_vloads.ll [moved from llvm/test/CodeGen/R600/combine_vloads.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/commute-compares.ll [moved from llvm/test/CodeGen/R600/commute-compares.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/commute_modifiers.ll [moved from llvm/test/CodeGen/R600/commute_modifiers.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/complex-folding.ll [moved from llvm/test/CodeGen/R600/complex-folding.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/concat_vectors.ll [moved from llvm/test/CodeGen/R600/concat_vectors.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll [moved from llvm/test/CodeGen/R600/copy-illegal-type.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/copy-to-reg.ll [moved from llvm/test/CodeGen/R600/copy-to-reg.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll [moved from llvm/test/CodeGen/R600/ctlz_zero_undef.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ctpop.ll [moved from llvm/test/CodeGen/R600/ctpop.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ctpop64.ll [moved from llvm/test/CodeGen/R600/ctpop64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll [moved from llvm/test/CodeGen/R600/cttz_zero_undef.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll [moved from llvm/test/CodeGen/R600/cvt_f32_ubyte.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll [moved from llvm/test/CodeGen/R600/cvt_flr_i32_f32.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll [moved from llvm/test/CodeGen/R600/cvt_rpi_i32_f32.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/dagcombiner-bug-illegal-vec4-int-to-fp.ll [moved from llvm/test/CodeGen/R600/dagcombiner-bug-illegal-vec4-int-to-fp.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/debug.ll [moved from llvm/test/CodeGen/R600/debug.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/default-fp-mode.ll [moved from llvm/test/CodeGen/R600/default-fp-mode.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/disconnected-predset-break-bug.ll [moved from llvm/test/CodeGen/R600/disconnected-predset-break-bug.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/dot4-folding.ll [moved from llvm/test/CodeGen/R600/dot4-folding.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll [moved from llvm/test/CodeGen/R600/ds-negative-offset-addressing-mode-loop.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ds_read2.ll [moved from llvm/test/CodeGen/R600/ds_read2.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll [moved from llvm/test/CodeGen/R600/ds_read2_offset_order.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ds_read2st64.ll [moved from llvm/test/CodeGen/R600/ds_read2st64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ds_write2.ll [moved from llvm/test/CodeGen/R600/ds_write2.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ds_write2st64.ll [moved from llvm/test/CodeGen/R600/ds_write2st64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/elf.ll [moved from llvm/test/CodeGen/R600/elf.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/elf.r600.ll [moved from llvm/test/CodeGen/R600/elf.r600.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/empty-function.ll [moved from llvm/test/CodeGen/R600/empty-function.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll [moved from llvm/test/CodeGen/R600/endcf-loop-header.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/extload-private.ll [moved from llvm/test/CodeGen/R600/extload-private.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/extload.ll [moved from llvm/test/CodeGen/R600/extload.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/extract_vector_elt_i16.ll [moved from llvm/test/CodeGen/R600/extract_vector_elt_i16.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fabs.f64.ll [moved from llvm/test/CodeGen/R600/fabs.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fabs.ll [moved from llvm/test/CodeGen/R600/fabs.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fadd.ll [moved from llvm/test/CodeGen/R600/fadd.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fadd64.ll [moved from llvm/test/CodeGen/R600/fadd64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fceil.ll [moved from llvm/test/CodeGen/R600/fceil.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fceil64.ll [moved from llvm/test/CodeGen/R600/fceil64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fcmp-cnd.ll [moved from llvm/test/CodeGen/R600/fcmp-cnd.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fcmp-cnde-int-args.ll [moved from llvm/test/CodeGen/R600/fcmp-cnde-int-args.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fcmp.ll [moved from llvm/test/CodeGen/R600/fcmp.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fcmp64.ll [moved from llvm/test/CodeGen/R600/fcmp64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fconst64.ll [moved from llvm/test/CodeGen/R600/fconst64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll [moved from llvm/test/CodeGen/R600/fcopysign.f32.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll [moved from llvm/test/CodeGen/R600/fcopysign.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fdiv.f64.ll [moved from llvm/test/CodeGen/R600/fdiv.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fdiv.ll [moved from llvm/test/CodeGen/R600/fdiv.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fetch-limits.r600.ll [moved from llvm/test/CodeGen/R600/fetch-limits.r600.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fetch-limits.r700+.ll [moved from llvm/test/CodeGen/R600/fetch-limits.r700+.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ffloor.f64.ll [moved from llvm/test/CodeGen/R600/ffloor.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ffloor.ll [moved from llvm/test/CodeGen/R600/ffloor.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/flat-address-space.ll [moved from llvm/test/CodeGen/R600/flat-address-space.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/floor.ll [moved from llvm/test/CodeGen/R600/floor.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fma-combine.ll [moved from llvm/test/CodeGen/R600/fma-combine.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fma.f64.ll [moved from llvm/test/CodeGen/R600/fma.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fma.ll [moved from llvm/test/CodeGen/R600/fma.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmad.ll [moved from llvm/test/CodeGen/R600/fmad.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmax.ll [moved from llvm/test/CodeGen/R600/fmax.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmax3.f64.ll [moved from llvm/test/CodeGen/R600/fmax3.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmax3.ll [moved from llvm/test/CodeGen/R600/fmax3.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll [moved from llvm/test/CodeGen/R600/fmax_legacy.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmax_legacy.ll [moved from llvm/test/CodeGen/R600/fmax_legacy.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmaxnum.f64.ll [moved from llvm/test/CodeGen/R600/fmaxnum.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmaxnum.ll [moved from llvm/test/CodeGen/R600/fmaxnum.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmin.ll [moved from llvm/test/CodeGen/R600/fmin.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmin3.ll [moved from llvm/test/CodeGen/R600/fmin3.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll [moved from llvm/test/CodeGen/R600/fmin_legacy.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmin_legacy.ll [moved from llvm/test/CodeGen/R600/fmin_legacy.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fminnum.f64.ll [moved from llvm/test/CodeGen/R600/fminnum.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fminnum.ll [moved from llvm/test/CodeGen/R600/fminnum.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmul.ll [moved from llvm/test/CodeGen/R600/fmul.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmul64.ll [moved from llvm/test/CodeGen/R600/fmul64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fmuladd.ll [moved from llvm/test/CodeGen/R600/fmuladd.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fnearbyint.ll [moved from llvm/test/CodeGen/R600/fnearbyint.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll [moved from llvm/test/CodeGen/R600/fneg-fabs.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fneg-fabs.ll [moved from llvm/test/CodeGen/R600/fneg-fabs.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fneg.f64.ll [moved from llvm/test/CodeGen/R600/fneg.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fneg.ll [moved from llvm/test/CodeGen/R600/fneg.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fp-classify.ll [moved from llvm/test/CodeGen/R600/fp-classify.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fp16_to_fp.ll [moved from llvm/test/CodeGen/R600/fp16_to_fp.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll [moved from llvm/test/CodeGen/R600/fp32_to_fp16.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll [moved from llvm/test/CodeGen/R600/fp_to_sint.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fp_to_sint.ll [moved from llvm/test/CodeGen/R600/fp_to_sint.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll [moved from llvm/test/CodeGen/R600/fp_to_uint.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fp_to_uint.ll [moved from llvm/test/CodeGen/R600/fp_to_uint.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fpext.ll [moved from llvm/test/CodeGen/R600/fpext.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fptrunc.ll [moved from llvm/test/CodeGen/R600/fptrunc.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/frem.ll [moved from llvm/test/CodeGen/R600/frem.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fsqrt.ll [moved from llvm/test/CodeGen/R600/fsqrt.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fsub.ll [moved from llvm/test/CodeGen/R600/fsub.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/fsub64.ll [moved from llvm/test/CodeGen/R600/fsub64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll [moved from llvm/test/CodeGen/R600/ftrunc.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ftrunc.ll [moved from llvm/test/CodeGen/R600/ftrunc.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/gep-address-space.ll [moved from llvm/test/CodeGen/R600/gep-address-space.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/global-directive.ll [moved from llvm/test/CodeGen/R600/global-directive.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/global-extload-i1.ll [moved from llvm/test/CodeGen/R600/global-extload-i1.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/global-extload-i16.ll [moved from llvm/test/CodeGen/R600/global-extload-i16.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/global-extload-i32.ll [moved from llvm/test/CodeGen/R600/global-extload-i32.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/global-extload-i8.ll [moved from llvm/test/CodeGen/R600/global-extload-i8.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/global-zero-initializer.ll [moved from llvm/test/CodeGen/R600/global-zero-initializer.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/global_atomics.ll [moved from llvm/test/CodeGen/R600/global_atomics.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/gv-const-addrspace-fail.ll [moved from llvm/test/CodeGen/R600/gv-const-addrspace-fail.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll [moved from llvm/test/CodeGen/R600/gv-const-addrspace.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/half.ll [moved from llvm/test/CodeGen/R600/half.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/hsa.ll [moved from llvm/test/CodeGen/R600/hsa.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll [moved from llvm/test/CodeGen/R600/i1-copy-implicit-def.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll [moved from llvm/test/CodeGen/R600/i1-copy-phi.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/i8-to-double-to-float.ll [moved from llvm/test/CodeGen/R600/i8-to-double-to-float.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/icmp-select-sete-reverse-args.ll [moved from llvm/test/CodeGen/R600/icmp-select-sete-reverse-args.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/icmp64.ll [moved from llvm/test/CodeGen/R600/icmp64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/imm.ll [moved from llvm/test/CodeGen/R600/imm.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll [moved from llvm/test/CodeGen/R600/indirect-addressing-si.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/indirect-private-64.ll [moved from llvm/test/CodeGen/R600/indirect-private-64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll [moved from llvm/test/CodeGen/R600/infinite-loop-evergreen.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/infinite-loop.ll [moved from llvm/test/CodeGen/R600/infinite-loop.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/inline-asm.ll [moved from llvm/test/CodeGen/R600/inline-asm.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/inline-calls.ll [moved from llvm/test/CodeGen/R600/inline-calls.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/input-mods.ll [moved from llvm/test/CodeGen/R600/input-mods.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/insert_subreg.ll [moved from llvm/test/CodeGen/R600/insert_subreg.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll [moved from llvm/test/CodeGen/R600/insert_vector_elt.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/jump-address.ll [moved from llvm/test/CodeGen/R600/jump-address.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/kcache-fold.ll [moved from llvm/test/CodeGen/R600/kcache-fold.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/kernel-args.ll [moved from llvm/test/CodeGen/R600/kernel-args.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/large-alloca.ll [moved from llvm/test/CodeGen/R600/large-alloca.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/large-constant-initializer.ll [moved from llvm/test/CodeGen/R600/large-constant-initializer.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/lds-initializer.ll [moved from llvm/test/CodeGen/R600/lds-initializer.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/lds-oqap-crash.ll [moved from llvm/test/CodeGen/R600/lds-oqap-crash.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/lds-output-queue.ll [moved from llvm/test/CodeGen/R600/lds-output-queue.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/lds-size.ll [moved from llvm/test/CodeGen/R600/lds-size.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll [moved from llvm/test/CodeGen/R600/lds-zero-initializer.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/legalizedag-bug-expand-setcc.ll [moved from llvm/test/CodeGen/R600/legalizedag-bug-expand-setcc.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/lit.local.cfg [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/literals.ll [moved from llvm/test/CodeGen/R600/literals.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.abs.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.abs.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.barrier.global.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.barrier.global.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.barrier.local.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.barrier.local.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.i32.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfi.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.bfi.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.bfm.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.bfm.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.brev.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.brev.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.clamp.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.clamp.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.class.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.class.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.cube.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.cube.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.cvt_f32_ubyte.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.div_fixup.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.div_fixup.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.div_fmas.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.div_fmas.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.div_scale.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.div_scale.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.flbit.i32.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.flbit.i32.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.fract.f64.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.fract.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.fract.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.fract.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.imad24.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.imad24.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.imax.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.imax.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.imin.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.imin.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.imul24.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.imul24.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.kill.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.kill.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.ldexp.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.ldexp.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.legacy.rsq.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.legacy.rsq.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.mul.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.mul.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rcp.f64.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rcp.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.rcp.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.clamped.f64.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.rsq.clamped.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.clamped.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.rsq.clamped.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.rsq.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.rsq.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.tex.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.tex.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.trig_preop.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.trunc.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.trunc.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.umad24.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.umad24.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.umax.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.umax.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.umin.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.umin.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.AMDGPU.umul24.ll [moved from llvm/test/CodeGen/R600/llvm.AMDGPU.umul24.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.fs.interp.ll [moved from llvm/test/CodeGen/R600/llvm.SI.fs.interp.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.gather4.ll [moved from llvm/test/CodeGen/R600/llvm.SI.gather4.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.getlod.ll [moved from llvm/test/CodeGen/R600/llvm.SI.getlod.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.image.ll [moved from llvm/test/CodeGen/R600/llvm.SI.image.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.image.sample.ll [moved from llvm/test/CodeGen/R600/llvm.SI.image.sample.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.image.sample.o.ll [moved from llvm/test/CodeGen/R600/llvm.SI.image.sample.o.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.imageload.ll [moved from llvm/test/CodeGen/R600/llvm.SI.imageload.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.load.dword.ll [moved from llvm/test/CodeGen/R600/llvm.SI.load.dword.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.resinfo.ll [moved from llvm/test/CodeGen/R600/llvm.SI.resinfo.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.sample-masked.ll [moved from llvm/test/CodeGen/R600/llvm.SI.sample-masked.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.sample.ll [moved from llvm/test/CodeGen/R600/llvm.SI.sample.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.sampled.ll [moved from llvm/test/CodeGen/R600/llvm.SI.sampled.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.sendmsg-m0.ll [moved from llvm/test/CodeGen/R600/llvm.SI.sendmsg-m0.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.sendmsg.ll [moved from llvm/test/CodeGen/R600/llvm.SI.sendmsg.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.tbuffer.store.ll [moved from llvm/test/CodeGen/R600/llvm.SI.tbuffer.store.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.SI.tid.ll [moved from llvm/test/CodeGen/R600/llvm.SI.tid.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.amdgpu.dp4.ll [moved from llvm/test/CodeGen/R600/llvm.amdgpu.dp4.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.amdgpu.kilp.ll [moved from llvm/test/CodeGen/R600/llvm.amdgpu.kilp.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.amdgpu.lrp.ll [moved from llvm/test/CodeGen/R600/llvm.amdgpu.lrp.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.cos.ll [moved from llvm/test/CodeGen/R600/llvm.cos.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.exp2.ll [moved from llvm/test/CodeGen/R600/llvm.exp2.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.log2.ll [moved from llvm/test/CodeGen/R600/llvm.log2.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll [moved from llvm/test/CodeGen/R600/llvm.memcpy.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.pow.ll [moved from llvm/test/CodeGen/R600/llvm.pow.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.rint.f64.ll [moved from llvm/test/CodeGen/R600/llvm.rint.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.rint.ll [moved from llvm/test/CodeGen/R600/llvm.rint.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll [moved from llvm/test/CodeGen/R600/llvm.round.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.round.ll [moved from llvm/test/CodeGen/R600/llvm.round.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.sin.ll [moved from llvm/test/CodeGen/R600/llvm.sin.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/llvm.sqrt.ll [moved from llvm/test/CodeGen/R600/llvm.sqrt.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/load-i1.ll [moved from llvm/test/CodeGen/R600/load-i1.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/load-input-fold.ll [moved from llvm/test/CodeGen/R600/load-input-fold.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/load.ll [moved from llvm/test/CodeGen/R600/load.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/load.vec.ll [moved from llvm/test/CodeGen/R600/load.vec.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/load64.ll [moved from llvm/test/CodeGen/R600/load64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/local-64.ll [moved from llvm/test/CodeGen/R600/local-64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/local-atomics.ll [moved from llvm/test/CodeGen/R600/local-atomics.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/local-atomics64.ll [moved from llvm/test/CodeGen/R600/local-atomics64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/local-memory-two-objects.ll [moved from llvm/test/CodeGen/R600/local-memory-two-objects.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/local-memory.ll [moved from llvm/test/CodeGen/R600/local-memory.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/loop-address.ll [moved from llvm/test/CodeGen/R600/loop-address.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/loop-idiom.ll [moved from llvm/test/CodeGen/R600/loop-idiom.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/lshl.ll [moved from llvm/test/CodeGen/R600/lshl.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/lshr.ll [moved from llvm/test/CodeGen/R600/lshr.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/m0-spill.ll [moved from llvm/test/CodeGen/R600/m0-spill.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/mad-combine.ll [moved from llvm/test/CodeGen/R600/mad-combine.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/mad-sub.ll [moved from llvm/test/CodeGen/R600/mad-sub.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/mad_int24.ll [moved from llvm/test/CodeGen/R600/mad_int24.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/mad_uint24.ll [moved from llvm/test/CodeGen/R600/mad_uint24.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/madak.ll [moved from llvm/test/CodeGen/R600/madak.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/madmk.ll [moved from llvm/test/CodeGen/R600/madmk.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/max-literals.ll [moved from llvm/test/CodeGen/R600/max-literals.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/max.ll [moved from llvm/test/CodeGen/R600/max.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/max3.ll [moved from llvm/test/CodeGen/R600/max3.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/merge-stores.ll [moved from llvm/test/CodeGen/R600/merge-stores.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/min.ll [moved from llvm/test/CodeGen/R600/min.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/min3.ll [moved from llvm/test/CodeGen/R600/min3.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/missing-store.ll [moved from llvm/test/CodeGen/R600/missing-store.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/mubuf.ll [moved from llvm/test/CodeGen/R600/mubuf.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/mul.ll [moved from llvm/test/CodeGen/R600/mul.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/mul_int24.ll [moved from llvm/test/CodeGen/R600/mul_int24.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/mul_uint24.ll [moved from llvm/test/CodeGen/R600/mul_uint24.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/mulhu.ll [moved from llvm/test/CodeGen/R600/mulhu.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll [moved from llvm/test/CodeGen/R600/no-initializer-constant-addrspace.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/no-shrink-extloads.ll [moved from llvm/test/CodeGen/R600/no-shrink-extloads.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/operand-folding.ll [moved from llvm/test/CodeGen/R600/operand-folding.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/operand-spacing.ll [moved from llvm/test/CodeGen/R600/operand-spacing.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/or.ll [moved from llvm/test/CodeGen/R600/or.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/packetizer.ll [moved from llvm/test/CodeGen/R600/packetizer.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/parallelandifcollapse.ll [moved from llvm/test/CodeGen/R600/parallelandifcollapse.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/parallelorifcollapse.ll [moved from llvm/test/CodeGen/R600/parallelorifcollapse.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/predicate-dp4.ll [moved from llvm/test/CodeGen/R600/predicate-dp4.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/predicates.ll [moved from llvm/test/CodeGen/R600/predicates.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll [moved from llvm/test/CodeGen/R600/private-memory-atomics.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/private-memory-broken.ll [moved from llvm/test/CodeGen/R600/private-memory-broken.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/private-memory.ll [moved from llvm/test/CodeGen/R600/private-memory.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/pv-packing.ll [moved from llvm/test/CodeGen/R600/pv-packing.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/pv.ll [moved from llvm/test/CodeGen/R600/pv.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/r600-encoding.ll [moved from llvm/test/CodeGen/R600/r600-encoding.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/r600-export-fix.ll [moved from llvm/test/CodeGen/R600/r600-export-fix.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll [moved from llvm/test/CodeGen/R600/r600-infinite-loop-bug-while-reorganizing-vector.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/r600cfg.ll [moved from llvm/test/CodeGen/R600/r600cfg.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/reciprocal.ll [moved from llvm/test/CodeGen/R600/reciprocal.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/register-count-comments.ll [moved from llvm/test/CodeGen/R600/register-count-comments.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/reorder-stores.ll [moved from llvm/test/CodeGen/R600/reorder-stores.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/rotl.i64.ll [moved from llvm/test/CodeGen/R600/rotl.i64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/rotl.ll [moved from llvm/test/CodeGen/R600/rotl.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/rotr.i64.ll [moved from llvm/test/CodeGen/R600/rotr.i64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/rotr.ll [moved from llvm/test/CodeGen/R600/rotr.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/rsq.ll [moved from llvm/test/CodeGen/R600/rsq.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/rv7x0_count3.ll [moved from llvm/test/CodeGen/R600/rv7x0_count3.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/s_movk_i32.ll [moved from llvm/test/CodeGen/R600/s_movk_i32.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/saddo.ll [moved from llvm/test/CodeGen/R600/saddo.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/salu-to-valu.ll [moved from llvm/test/CodeGen/R600/salu-to-valu.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll [moved from llvm/test/CodeGen/R600/scalar_to_vector.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll [moved from llvm/test/CodeGen/R600/schedule-fs-loop-nested-if.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested.ll [moved from llvm/test/CodeGen/R600/schedule-fs-loop-nested.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/schedule-fs-loop.ll [moved from llvm/test/CodeGen/R600/schedule-fs-loop.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/schedule-global-loads.ll [moved from llvm/test/CodeGen/R600/schedule-global-loads.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/schedule-if-2.ll [moved from llvm/test/CodeGen/R600/schedule-if-2.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/schedule-if.ll [moved from llvm/test/CodeGen/R600/schedule-if.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll [moved from llvm/test/CodeGen/R600/schedule-kernel-arg-loads.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll [moved from llvm/test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop.ll [moved from llvm/test/CodeGen/R600/schedule-vs-if-nested-loop.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/scratch-buffer.ll [moved from llvm/test/CodeGen/R600/scratch-buffer.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sdiv.ll [moved from llvm/test/CodeGen/R600/sdiv.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sdivrem24.ll [moved from llvm/test/CodeGen/R600/sdivrem24.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sdivrem64.ll [moved from llvm/test/CodeGen/R600/sdivrem64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/select-i1.ll [moved from llvm/test/CodeGen/R600/select-i1.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/select-vectors.ll [moved from llvm/test/CodeGen/R600/select-vectors.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/select.ll [moved from llvm/test/CodeGen/R600/select.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/select64.ll [moved from llvm/test/CodeGen/R600/select64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/selectcc-cnd.ll [moved from llvm/test/CodeGen/R600/selectcc-cnd.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/selectcc-cnde-int.ll [moved from llvm/test/CodeGen/R600/selectcc-cnde-int.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll [moved from llvm/test/CodeGen/R600/selectcc-icmp-select-float.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/selectcc-opt.ll [moved from llvm/test/CodeGen/R600/selectcc-opt.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/selectcc.ll [moved from llvm/test/CodeGen/R600/selectcc.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/set-dx10.ll [moved from llvm/test/CodeGen/R600/set-dx10.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/setcc-equivalent.ll [moved from llvm/test/CodeGen/R600/setcc-equivalent.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/setcc-opt.ll [moved from llvm/test/CodeGen/R600/setcc-opt.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/setcc.ll [moved from llvm/test/CodeGen/R600/setcc.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/setcc64.ll [moved from llvm/test/CodeGen/R600/setcc64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/seto.ll [moved from llvm/test/CodeGen/R600/seto.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/setuo.ll [moved from llvm/test/CodeGen/R600/setuo.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sext-eliminate.ll [moved from llvm/test/CodeGen/R600/sext-eliminate.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sext-in-reg.ll [moved from llvm/test/CodeGen/R600/sext-in-reg.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll [moved from llvm/test/CodeGen/R600/sgpr-control-flow.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll [moved from llvm/test/CodeGen/R600/sgpr-copy-duplicate-operand.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sgpr-copy.ll [moved from llvm/test/CodeGen/R600/sgpr-copy.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/shared-op-cycle.ll [moved from llvm/test/CodeGen/R600/shared-op-cycle.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/shl.ll [moved from llvm/test/CodeGen/R600/shl.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/shl_add_constant.ll [moved from llvm/test/CodeGen/R600/shl_add_constant.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll [moved from llvm/test/CodeGen/R600/shl_add_ptr.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/si-annotate-cf-assertion.ll [moved from llvm/test/CodeGen/R600/si-annotate-cf-assertion.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll [moved from llvm/test/CodeGen/R600/si-annotate-cf.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/si-lod-bias.ll [moved from llvm/test/CodeGen/R600/si-lod-bias.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll [moved from llvm/test/CodeGen/R600/si-sgpr-spill.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/si-spill-cf.ll [moved from llvm/test/CodeGen/R600/si-spill-cf.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll [moved from llvm/test/CodeGen/R600/si-triv-disjoint-mem-access.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/si-vector-hang.ll [moved from llvm/test/CodeGen/R600/si-vector-hang.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sign_extend.ll [moved from llvm/test/CodeGen/R600/sign_extend.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/simplify-demanded-bits-build-pair.ll [moved from llvm/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll [moved from llvm/test/CodeGen/R600/sint_to_fp.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sint_to_fp.ll [moved from llvm/test/CodeGen/R600/sint_to_fp.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/smrd.ll [moved from llvm/test/CodeGen/R600/smrd.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll [moved from llvm/test/CodeGen/R600/split-scalar-i64-add.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sra.ll [moved from llvm/test/CodeGen/R600/sra.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/srem.ll [moved from llvm/test/CodeGen/R600/srem.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/srl.ll [moved from llvm/test/CodeGen/R600/srl.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/ssubo.ll [moved from llvm/test/CodeGen/R600/ssubo.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/store-barrier.ll [moved from llvm/test/CodeGen/R600/store-barrier.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/store-v3i32.ll [moved from llvm/test/CodeGen/R600/store-v3i32.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/store-v3i64.ll [moved from llvm/test/CodeGen/R600/store-v3i64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/store-vector-ptrs.ll [moved from llvm/test/CodeGen/R600/store-vector-ptrs.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/store.ll [moved from llvm/test/CodeGen/R600/store.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/store.r600.ll [moved from llvm/test/CodeGen/R600/store.r600.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/structurize.ll [moved from llvm/test/CodeGen/R600/structurize.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/structurize1.ll [moved from llvm/test/CodeGen/R600/structurize1.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/sub.ll [moved from llvm/test/CodeGen/R600/sub.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll [moved from llvm/test/CodeGen/R600/subreg-coalescer-crash.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/subreg-eliminate-dead.ll [moved from llvm/test/CodeGen/R600/subreg-eliminate-dead.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/swizzle-export.ll [moved from llvm/test/CodeGen/R600/swizzle-export.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/tex-clause-antidep.ll [moved from llvm/test/CodeGen/R600/tex-clause-antidep.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/texture-input-merge.ll [moved from llvm/test/CodeGen/R600/texture-input-merge.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll [moved from llvm/test/CodeGen/R600/trunc-cmp-constant.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll [moved from llvm/test/CodeGen/R600/trunc-store-f64-to-f16.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll [moved from llvm/test/CodeGen/R600/trunc-store-i1.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll [moved from llvm/test/CodeGen/R600/trunc-vector-store-assertion-failure.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/trunc.ll [moved from llvm/test/CodeGen/R600/trunc.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/tti-unroll-prefs.ll [moved from llvm/test/CodeGen/R600/tti-unroll-prefs.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/uaddo.ll [moved from llvm/test/CodeGen/R600/uaddo.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/udiv.ll [moved from llvm/test/CodeGen/R600/udiv.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/udivrem.ll [moved from llvm/test/CodeGen/R600/udivrem.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/udivrem24.ll [moved from llvm/test/CodeGen/R600/udivrem24.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/udivrem64.ll [moved from llvm/test/CodeGen/R600/udivrem64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll [moved from llvm/test/CodeGen/R600/uint_to_fp.f64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/uint_to_fp.ll [moved from llvm/test/CodeGen/R600/uint_to_fp.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll [moved from llvm/test/CodeGen/R600/unaligned-load-store.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll [moved from llvm/test/CodeGen/R600/unhandled-loop-condition-assertion.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/unroll.ll [moved from llvm/test/CodeGen/R600/unroll.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/unsupported-cc.ll [moved from llvm/test/CodeGen/R600/unsupported-cc.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/urecip.ll [moved from llvm/test/CodeGen/R600/urecip.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/urem.ll [moved from llvm/test/CodeGen/R600/urem.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll [moved from llvm/test/CodeGen/R600/use-sgpr-multiple-times.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/usubo.ll [moved from llvm/test/CodeGen/R600/usubo.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/v1i64-kernel-arg.ll [moved from llvm/test/CodeGen/R600/v1i64-kernel-arg.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/v_cndmask.ll [moved from llvm/test/CodeGen/R600/v_cndmask.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/valu-i1.ll [moved from llvm/test/CodeGen/R600/valu-i1.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/vector-alloca.ll [moved from llvm/test/CodeGen/R600/vector-alloca.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/vertex-fetch-encoding.ll [moved from llvm/test/CodeGen/R600/vertex-fetch-encoding.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/vop-shrink.ll [moved from llvm/test/CodeGen/R600/vop-shrink.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/vselect.ll [moved from llvm/test/CodeGen/R600/vselect.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/vselect64.ll [moved from llvm/test/CodeGen/R600/vselect64.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/vtx-fetch-branch.ll [moved from llvm/test/CodeGen/R600/vtx-fetch-branch.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/vtx-schedule.ll [moved from llvm/test/CodeGen/R600/vtx-schedule.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/wait.ll [moved from llvm/test/CodeGen/R600/wait.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/work-item-intrinsics.ll [moved from llvm/test/CodeGen/R600/work-item-intrinsics.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/wrong-transalu-pos-fix.ll [moved from llvm/test/CodeGen/R600/wrong-transalu-pos-fix.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/xor.ll [moved from llvm/test/CodeGen/R600/xor.ll with 100% similarity]
llvm/test/CodeGen/AMDGPU/zero_extend.ll [moved from llvm/test/CodeGen/R600/zero_extend.ll with 100% similarity]
llvm/test/CodeGen/R600/lit.local.cfg [deleted file]
llvm/test/MC/AMDGPU/ds-err.s [moved from llvm/test/MC/R600/ds-err.s with 100% similarity]
llvm/test/MC/AMDGPU/ds.s [moved from llvm/test/MC/R600/ds.s with 100% similarity]
llvm/test/MC/AMDGPU/flat.s [moved from llvm/test/MC/R600/flat.s with 100% similarity]
llvm/test/MC/AMDGPU/lit.local.cfg [new file with mode: 0644]
llvm/test/MC/AMDGPU/mubuf.s [moved from llvm/test/MC/R600/mubuf.s with 100% similarity]
llvm/test/MC/AMDGPU/smrd.s [moved from llvm/test/MC/R600/smrd.s with 100% similarity]
llvm/test/MC/AMDGPU/sop1-err.s [moved from llvm/test/MC/R600/sop1-err.s with 100% similarity]
llvm/test/MC/AMDGPU/sop1.s [moved from llvm/test/MC/R600/sop1.s with 100% similarity]
llvm/test/MC/AMDGPU/sop2.s [moved from llvm/test/MC/R600/sop2.s with 100% similarity]
llvm/test/MC/AMDGPU/sopc.s [moved from llvm/test/MC/R600/sopc.s with 100% similarity]
llvm/test/MC/AMDGPU/sopk.s [moved from llvm/test/MC/R600/sopk.s with 100% similarity]
llvm/test/MC/AMDGPU/sopp.s [moved from llvm/test/MC/R600/sopp.s with 100% similarity]
llvm/test/MC/AMDGPU/vop1.s [moved from llvm/test/MC/R600/vop1.s with 100% similarity]
llvm/test/MC/AMDGPU/vop2-err.s [moved from llvm/test/MC/R600/vop2-err.s with 100% similarity]
llvm/test/MC/AMDGPU/vop2.s [moved from llvm/test/MC/R600/vop2.s with 100% similarity]
llvm/test/MC/AMDGPU/vop3-errs.s [moved from llvm/test/MC/R600/vop3-errs.s with 100% similarity]
llvm/test/MC/AMDGPU/vop3.s [moved from llvm/test/MC/R600/vop3.s with 100% similarity]
llvm/test/MC/AMDGPU/vopc.s [moved from llvm/test/MC/R600/vopc.s with 100% similarity]
llvm/test/MC/R600/lit.local.cfg [deleted file]

index 026fe47..da73149 100644 (file)
@@ -176,6 +176,7 @@ set(LLVM_INCLUDE_DIR ${CMAKE_CURRENT_BINARY_DIR}/include)
 
 set(LLVM_ALL_TARGETS
   AArch64
+  AMDGPU
   ARM
   BPF
   CppBackend
@@ -184,7 +185,6 @@ set(LLVM_ALL_TARGETS
   MSP430
   NVPTX
   PowerPC
-  R600
   Sparc
   SystemZ
   X86
index 11ba051..5b70fbd 100644 (file)
@@ -1097,7 +1097,7 @@ if test "$llvm_cv_enable_crash_overrides" = "yes" ; then
 fi
 
 dnl List all possible targets
-ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600 BPF"
+ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ AMDGPU BPF"
 AC_SUBST(ALL_TARGETS,$ALL_TARGETS)
 
 dnl Allow specific targets to be specified for building (or not)
@@ -1132,7 +1132,8 @@ case "$enableval" in
         hexagon)  TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;;
         nvptx)    TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;;
         systemz)  TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
-        r600)     TARGETS_TO_BUILD="R600 $TARGETS_TO_BUILD" ;;
+        amdgpu)  ;&
+        r600)     TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;;
         host) case "$llvm_cv_target_arch" in
             x86)         TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
             x86_64)      TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
index 6cb9f2d..73fce67 100755 (executable)
@@ -5628,7 +5628,7 @@ _ACEOF
 
 fi
 
-ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600 BPF"
+ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ AMDGPU BPF"
 ALL_TARGETS=$ALL_TARGETS
 
 
@@ -5665,7 +5665,8 @@ case "$enableval" in
         hexagon)  TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;;
         nvptx)    TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;;
         systemz)  TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
-        r600)     TARGETS_TO_BUILD="R600 $TARGETS_TO_BUILD" ;;
+        amdgpu)  ;&
+        r600)     TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;;
         host) case "$llvm_cv_target_arch" in
             x86)         TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
             x86_64)      TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
similarity index 91%
rename from llvm/docs/R600Usage.rst
rename to llvm/docs/AMDGPUUsage.rst
index 9bd16f4..3cb41ce 100644 (file)
@@ -1,11 +1,11 @@
-============================
-User Guide for R600 Back-end
-============================
+==============================
+User Guide for AMDGPU Back-end
+==============================
 
 Introduction
 ============
 
-The R600 back-end provides ISA code generation for AMD GPUs, starting with
+The AMDGPU back-end provides ISA code generation for AMD GPUs, starting with
 the R600 family up until the current Volcanic Islands (GCN Gen 3).
 
 
@@ -14,7 +14,7 @@ Assembler
 
 The assembler is currently considered experimental.
 
-For syntax examples look in test/MC/R600.
+For syntax examples look in test/MC/AMDGPU.
 
 Below some of the currently supported features (modulo bugs).  These
 all apply to the Southern Islands ISA, Sea Islands and Volcanic Islands
index 2dfdc9b..900ba24 100644 (file)
@@ -68,8 +68,8 @@ Other documents, collections, notes
 * `PowerPC64 alignment of long doubles (from GCC) <http://gcc.gnu.org/ml/gcc-patches/2003-09/msg00997.html>`_
 * `Long branch stubs for powerpc64-linux (from binutils) <http://sources.redhat.com/ml/binutils/2002-04/msg00573.html>`_
 
-R600
-----
+AMDGPU
+------
 
 * `AMD R6xx shader ISA <http://developer.amd.com/wordpress/media/2012/10/R600_Instruction_Set_Architecture.pdf>`_
 * `AMD R7xx shader ISA <http://developer.amd.com/wordpress/media/2012/10/R700-Family_Instruction_Set_Architecture.pdf>`_
index 18b3c1d..212fa0b 100644 (file)
@@ -711,7 +711,7 @@ used by people developing LLVM.
 |                         | as ``LLVM_ALL_TARGETS``, and can be set to include |
 |                         | out-of-tree targets. The default value includes:   |
 |                         | ``AArch64, ARM, CppBackend, Hexagon,               |
-|                         | Mips, MSP430, NVPTX, PowerPC, R600, Sparc,         |
+|                         | Mips, MSP430, NVPTX, PowerPC, AMDGPU, Sparc,       |
 |                         | SystemZ, X86, XCore``.                             |
 +-------------------------+----------------------------------------------------+
 | LLVM_ENABLE_DOXYGEN     | Build doxygen-based documentation from the source  |
index 2cc5b8b..0b68118 100644 (file)
@@ -252,7 +252,7 @@ For API clients and LLVM developers.
    WritingAnLLVMPass
    HowToUseAttributes
    NVPTXUsage
-   R600Usage
+   AMDGPUUsage
    StackMaps
    InAlloca
    BigEndianNEON
@@ -338,8 +338,8 @@ For API clients and LLVM developers.
 :doc:`NVPTXUsage`
    This document describes using the NVPTX back-end to compile GPU kernels.
 
-:doc:`R600Usage`
-   This document describes how to use the R600 back-end.
+:doc:`AMDGPUUsage`
+   This document describes how to use the AMDGPU back-end.
 
 :doc:`StackMaps`
   LLVM support for mapping instruction addresses to the location of
similarity index 99%
rename from llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp
rename to llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 56b50a9..29c2da6 100644 (file)
@@ -80,7 +80,7 @@ createAMDGPUAsmPrinterPass(TargetMachine &tm,
   return new AMDGPUAsmPrinter(tm, std::move(Streamer));
 }
 
-extern "C" void LLVMInitializeR600AsmPrinter() {
+extern "C" void LLVMInitializeAMDGPUAsmPrinter() {
   TargetRegistry::RegisterAsmPrinter(TheAMDGPUTarget, createAMDGPUAsmPrinterPass);
   TargetRegistry::RegisterAsmPrinter(TheGCNTarget, createAMDGPUAsmPrinterPass);
 }
@@ -37,7 +37,7 @@
 
 using namespace llvm;
 
-extern "C" void LLVMInitializeR600Target() {
+extern "C" void LLVMInitializeAMDGPUTarget() {
   // Register the target
   RegisterTargetMachine<R600TargetMachine> X(TheAMDGPUTarget);
   RegisterTargetMachine<GCNTargetMachine> Y(TheGCNTarget);
@@ -1369,7 +1369,7 @@ void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) {
 }
 
 /// Force static initialization.
-extern "C" void LLVMInitializeR600AsmParser() {
+extern "C" void LLVMInitializeAMDGPUAsmParser() {
   RegisterMCAsmParser<AMDGPUAsmParser> A(TheAMDGPUTarget);
   RegisterMCAsmParser<AMDGPUAsmParser> B(TheGCNTarget);
 }
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/CMakeLists.txt b/llvm/lib/Target/AMDGPU/AsmParser/CMakeLists.txt
new file mode 100644 (file)
index 0000000..21ddc4e
--- /dev/null
@@ -0,0 +1,3 @@
+add_llvm_library(LLVMAMDGPUAsmParser
+  AMDGPUAsmParser.cpp
+  )
@@ -1,4 +1,4 @@
-;===- ./lib/Target/R600/AsmParser/LLVMBuild.txt -------------*- Conf -*--===;
+;===- ./lib/Target/AMDGPU/AsmParser/LLVMBuild.txt -------------*- Conf -*--===;
 ;
 ;                     The LLVM Compiler Infrastructure
 ;
@@ -17,7 +17,7 @@
 
 [component_0]
 type = Library
-name = R600AsmParser
-parent = R600
-required_libraries = MC MCParser R600Desc R600Info Support
-add_to_library_groups = R600
+name = AMDGPUAsmParser
+parent = AMDGPU
+required_libraries = MC MCParser AMDGPUDesc AMDGPUInfo Support
+add_to_library_groups = AMDGPU
similarity index 98%
rename from llvm/lib/Target/R600/CMakeLists.txt
rename to llvm/lib/Target/AMDGPU/CMakeLists.txt
index 3c1bc49..3e5ff1f 100644 (file)
@@ -12,7 +12,7 @@ tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
 add_public_tablegen_target(AMDGPUCommonTableGen)
 
-add_llvm_target(R600CodeGen
+add_llvm_target(AMDGPUCodeGen
   AMDILCFGStructurizer.cpp
   AMDGPUAlwaysInlinePass.cpp
   AMDGPUAsmPrinter.cpp
diff --git a/llvm/lib/Target/AMDGPU/InstPrinter/CMakeLists.txt b/llvm/lib/Target/AMDGPU/InstPrinter/CMakeLists.txt
new file mode 100644 (file)
index 0000000..ce63bd5
--- /dev/null
@@ -0,0 +1,3 @@
+add_llvm_library(LLVMAMDGPUAsmPrinter
+  AMDGPUInstPrinter.cpp
+  )
@@ -1,4 +1,4 @@
-;===- ./lib/Target/R600/InstPrinter/LLVMBuild.txt -----------*- Conf -*--===;
+;===- ./lib/Target/AMDGPU/InstPrinter/LLVMBuild.txt -----------*- Conf -*--===;
 ;
 ;                     The LLVM Compiler Infrastructure
 ;
@@ -17,8 +17,8 @@
 
 [component_0]
 type = Library
-name = R600AsmPrinter
-parent = R600
+name = AMDGPUAsmPrinter
+parent = AMDGPU
 required_libraries = MC Support
-add_to_library_groups = R600
+add_to_library_groups = AMDGPU
 
similarity index 76%
rename from llvm/lib/Target/R600/LLVMBuild.txt
rename to llvm/lib/Target/AMDGPU/LLVMBuild.txt
index f3f254f..c6861df 100644 (file)
@@ -20,14 +20,14 @@ subdirectories = AsmParser InstPrinter MCTargetDesc TargetInfo
 
 [component_0]
 type = TargetGroup
-name = R600
+name = AMDGPU
 parent = Target
 has_asmparser = 1
 has_asmprinter = 1
 
 [component_1]
 type = Library
-name = R600CodeGen
-parent = R600
-required_libraries = Analysis AsmPrinter CodeGen Core IPO MC R600AsmParser R600AsmPrinter R600Desc R600Info Scalar SelectionDAG Support Target TransformUtils
-add_to_library_groups = R600
+name = AMDGPUCodeGen
+parent = AMDGPU
+required_libraries = Analysis AsmPrinter CodeGen Core IPO MC AMDGPUAsmParser AMDGPUAsmPrinter AMDGPUDesc AMDGPUInfo Scalar SelectionDAG Support Target TransformUtils
+add_to_library_groups = AMDGPU
@@ -72,7 +72,7 @@ static MCInstPrinter *createAMDGPUMCInstPrinter(const Triple &T,
   return new AMDGPUInstPrinter(MAI, MII, MRI);
 }
 
-extern "C" void LLVMInitializeR600TargetMC() {
+extern "C" void LLVMInitializeAMDGPUTargetMC() {
   for (Target *T : {&TheAMDGPUTarget, &TheGCNTarget}) {
     RegisterMCAsmInfo<AMDGPUMCAsmInfo> X(*T);
 
@@ -1,5 +1,5 @@
 
-add_llvm_library(LLVMR600Desc
+add_llvm_library(LLVMAMDGPUDesc
   AMDGPUAsmBackend.cpp
   AMDGPUELFObjectWriter.cpp
   AMDGPUMCCodeEmitter.cpp
@@ -1,4 +1,4 @@
-;===- ./lib/Target/R600/MCTargetDesc/LLVMBuild.txt -------------*- Conf -*--===;
+;===- ./lib/Target/AMDGPU/MCTargetDesc/LLVMBuild.txt -------------*- Conf -*--===;
 ;
 ;                     The LLVM Compiler Infrastructure
 ;
@@ -17,7 +17,7 @@
 
 [component_0]
 type = Library
-name = R600Desc
-parent = R600
-required_libraries = MC R600AsmPrinter R600Info Support
-add_to_library_groups = R600
+name = AMDGPUDesc
+parent = AMDGPU
+required_libraries = MC AMDGPUAsmPrinter AMDGPUInfo Support
+add_to_library_groups = AMDGPU
@@ -23,7 +23,7 @@ Target llvm::TheAMDGPUTarget;
 Target llvm::TheGCNTarget;
 
 /// \brief Extern function to initialize the targets for the AMDGPU backend
-extern "C" void LLVMInitializeR600TargetInfo() {
+extern "C" void LLVMInitializeAMDGPUTargetInfo() {
   RegisterTarget<Triple::r600, false>
     R600(TheAMDGPUTarget, "r600", "AMD GPUs HD2XXX-HD6XXX");
   RegisterTarget<Triple::amdgcn, false> GCN(TheGCNTarget, "amdgcn", "AMD GCN GPUs");
diff --git a/llvm/lib/Target/AMDGPU/TargetInfo/CMakeLists.txt b/llvm/lib/Target/AMDGPU/TargetInfo/CMakeLists.txt
new file mode 100644 (file)
index 0000000..961dc55
--- /dev/null
@@ -0,0 +1,3 @@
+add_llvm_library(LLVMAMDGPUInfo
+  AMDGPUTargetInfo.cpp
+  )
@@ -1,4 +1,4 @@
-;===- ./lib/Target/R600/TargetInfo/LLVMBuild.txt --------------*- Conf -*--===;
+;===- ./lib/Target/AMDGPU/TargetInfo/LLVMBuild.txt --------------*- Conf -*--===;
 ;
 ;                     The LLVM Compiler Infrastructure
 ;
@@ -17,7 +17,7 @@
 
 [component_0]
 type = Library
-name = R600Info
-parent = R600
+name = AMDGPUInfo
+parent = AMDGPU
 required_libraries = Support
-add_to_library_groups = R600
+add_to_library_groups = AMDGPU
index 3af3426..ab82324 100644 (file)
@@ -19,6 +19,7 @@
 ; will typically require only insertion of a line.
 [common]
 subdirectories =
+ AMDGPU
  ARM
  AArch64
  BPF
@@ -28,7 +29,6 @@ subdirectories =
  NVPTX
  Mips
  PowerPC
- R600
  Sparc
  SystemZ
  X86
diff --git a/llvm/lib/Target/R600/AsmParser/CMakeLists.txt b/llvm/lib/Target/R600/AsmParser/CMakeLists.txt
deleted file mode 100644 (file)
index 1b42af7..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-add_llvm_library(LLVMR600AsmParser
-  AMDGPUAsmParser.cpp
-  )
diff --git a/llvm/lib/Target/R600/InstPrinter/CMakeLists.txt b/llvm/lib/Target/R600/InstPrinter/CMakeLists.txt
deleted file mode 100644 (file)
index dcd8703..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-add_llvm_library(LLVMR600AsmPrinter
-  AMDGPUInstPrinter.cpp
-  )
diff --git a/llvm/lib/Target/R600/TargetInfo/CMakeLists.txt b/llvm/lib/Target/R600/TargetInfo/CMakeLists.txt
deleted file mode 100644 (file)
index c3bd26c..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-add_llvm_library(LLVMR600Info
-  AMDGPUTargetInfo.cpp
-  )
diff --git a/llvm/test/CodeGen/AMDGPU/lit.local.cfg b/llvm/test/CodeGen/AMDGPU/lit.local.cfg
new file mode 100644 (file)
index 0000000..2a665f0
--- /dev/null
@@ -0,0 +1,2 @@
+if not 'AMDGPU' in config.root.targets:
+    config.unsupported = True
diff --git a/llvm/test/CodeGen/R600/lit.local.cfg b/llvm/test/CodeGen/R600/lit.local.cfg
deleted file mode 100644 (file)
index ad9ce25..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-if not 'R600' in config.root.targets:
-    config.unsupported = True
diff --git a/llvm/test/MC/AMDGPU/lit.local.cfg b/llvm/test/MC/AMDGPU/lit.local.cfg
new file mode 100644 (file)
index 0000000..2a665f0
--- /dev/null
@@ -0,0 +1,2 @@
+if not 'AMDGPU' in config.root.targets:
+    config.unsupported = True
diff --git a/llvm/test/MC/R600/lit.local.cfg b/llvm/test/MC/R600/lit.local.cfg
deleted file mode 100644 (file)
index ad9ce25..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-if not 'R600' in config.root.targets:
-    config.unsupported = True