drm/amdgpu: rename psp_execute_non_psp_fw_load and make it global
authorLang Yu <Lang.Yu@amd.com>
Sat, 8 Jul 2023 04:20:06 +0000 (12:20 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 12 Jul 2023 15:12:09 +0000 (11:12 -0400)
This will make this function more general, and then serve other IPs.

Suggested-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

index c250846..a1a4408 100644 (file)
@@ -2448,8 +2448,8 @@ static int psp_prep_load_ip_fw_cmd_buf(struct amdgpu_firmware_info *ucode,
        return ret;
 }
 
-static int psp_execute_non_psp_fw_load(struct psp_context *psp,
-                                 struct amdgpu_firmware_info *ucode)
+int psp_execute_ip_fw_load(struct psp_context *psp,
+                          struct amdgpu_firmware_info *ucode)
 {
        int ret = 0;
        struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);
@@ -2492,7 +2492,7 @@ static int psp_load_smu_fw(struct psp_context *psp)
                        DRM_WARN("Failed to set MP1 state prepare for reload\n");
        }
 
-       ret = psp_execute_non_psp_fw_load(psp, ucode);
+       ret = psp_execute_ip_fw_load(psp, ucode);
 
        if (ret)
                DRM_ERROR("PSP load smu failed!\n");
@@ -2534,7 +2534,7 @@ int psp_load_fw_list(struct psp_context *psp,
        for (i = 0; i < ucode_count; ++i) {
                ucode = ucode_list[i];
                psp_print_fw_hdr(psp, ucode);
-               ret = psp_execute_non_psp_fw_load(psp, ucode);
+               ret = psp_execute_ip_fw_load(psp, ucode);
                if (ret)
                        return ret;
        }
@@ -2581,7 +2581,7 @@ static int psp_load_non_psp_fw(struct psp_context *psp)
 
                psp_print_fw_hdr(psp, ucode);
 
-               ret = psp_execute_non_psp_fw_load(psp, ucode);
+               ret = psp_execute_ip_fw_load(psp, ucode);
                if (ret)
                        return ret;
 
@@ -2930,7 +2930,7 @@ int psp_update_vcn_sram(struct amdgpu_device *adev, int inst_idx,
        ucode.mc_addr = cmd_gpu_addr;
        ucode.ucode_size = cmd_size;
 
-       return psp_execute_non_psp_fw_load(&adev->psp, &ucode);
+       return psp_execute_ip_fw_load(&adev->psp, &ucode);
 }
 
 int psp_ring_cmd_submit(struct psp_context *psp,
index 0502301..efb3972 100644 (file)
@@ -462,6 +462,9 @@ extern int psp_wait_for(struct psp_context *psp, uint32_t reg_index,
 extern int psp_wait_for_spirom_update(struct psp_context *psp, uint32_t reg_index,
                        uint32_t field_val, uint32_t mask, uint32_t msec_timeout);
 
+int psp_execute_ip_fw_load(struct psp_context *psp,
+                          struct amdgpu_firmware_info *ucode);
+
 int psp_gpu_reset(struct amdgpu_device *adev);
 int psp_update_vcn_sram(struct amdgpu_device *adev, int inst_idx,
                        uint64_t cmd_gpu_addr, int cmd_size);