mmc: sdhci-acpi: Add SDHCI_QUIRK2_BROKEN_64_BIT_DMA for AMDI0040
authorRaul E Rangel <rrangel@chromium.org>
Fri, 8 May 2020 22:54:21 +0000 (16:54 -0600)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 11 May 2020 08:51:30 +0000 (10:51 +0200)
The AMD eMMC 5.0 controller does not support 64 bit DMA.

Fixes: 34597a3f60b1 ("mmc: sdhci-acpi: Add support for ACPI HID of AMD Controller with HS400")
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Link: https://marc.info/?l=linux-mmc&m=158879884514552&w=2
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200508165344.1.Id5bb8b1ae7ea576f26f9d91c761df7ccffbf58c5@changeid
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-acpi.c

index faba53c..d8b76cb 100644 (file)
@@ -605,10 +605,12 @@ static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev,
 }
 
 static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
-       .chip   = &sdhci_acpi_chip_amd,
-       .caps   = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
-       .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE |
-                       SDHCI_QUIRK_32BIT_ADMA_SIZE,
+       .chip           = &sdhci_acpi_chip_amd,
+       .caps           = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
+       .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
+                         SDHCI_QUIRK_32BIT_DMA_SIZE |
+                         SDHCI_QUIRK_32BIT_ADMA_SIZE,
+       .quirks2        = SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
        .probe_slot     = sdhci_acpi_emmc_amd_probe_slot,
 };