GBE: I64CMP should be treated as CMP in reg allocation and insn scheduling.

Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>

diff --git a/backend/src/backend/gen_insn_scheduling.cpp b/backend/src/backend/gen_insn_scheduling.cpp
index 7ccf6d9..f1f5775 100644 (file)
--- a/backend/src/backend/gen_insn_scheduling.cpp
+++ b/backend/src/backend/gen_insn_scheduling.cpp
@@ -338,7 +338,7 @@ namespace gbe
     }
 
     // Track writes in predicates
-    if (insn.opcode == SEL_OP_CMP) {
+    if (insn.opcode == SEL_OP_CMP || insn.opcode == SEL_OP_I64CMP) {
       const uint32_t index = this->getIndex(getFlag(insn));
       this->nodes[index] = node;
     }
@@ -460,7 +460,7 @@ namespace gbe
         tracker.addDependency(node, insn.dst(dstID));
 
       // write-after-write for predicate
-      if (insn.opcode == SEL_OP_CMP)
+      if (insn.opcode == SEL_OP_CMP || insn.opcode == SEL_OP_I64CMP)
         tracker.addDependency(node, getFlag(insn));
 
       // write-after-write for accumulators

diff --git a/backend/src/backend/gen_reg_allocation.cpp b/backend/src/backend/gen_reg_allocation.cpp
index 5b243c4..a765917 100644 (file)
--- a/backend/src/backend/gen_reg_allocation.cpp
+++ b/backend/src/backend/gen_reg_allocation.cpp
@@ -457,7 +457,7 @@ namespace gbe
 
           // Compare instructions update the flags so we must copy it back to
           // the GRF
-          if (insn.opcode == SEL_OP_CMP) {
+          if (insn.opcode == SEL_OP_CMP || insn.opcode == SEL_OP_I64CMP) {
             SelectionInstruction *mov1 = selection.create(SEL_OP_MOV,1,1);
             mov1->state = mov0->state;
             mov1->dst(0) = mov0->src(0);