arm64: topology: move store_cpu_topology() to shared code

arm64's method of defining a default cpu topology requires only minimal
changes to apply to RISC-V also. The current arm64 implementation exits
early in a uniprocessor configuration by reading MPIDR & claiming that
uniprocessor can rely on the default values.

This is appears to be a hangover from prior to '3102bc0e6ac7 ("arm64:
topology: Stop using MPIDR for topology information")', because the
current code just assigns default values for multiprocessor systems.

With the MPIDR references removed, store_cpu_topolgy() can be moved to
the common arch_topology code.

Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c
index 869ffc4..7889a00 100644 (file)
--- a/arch/arm64/kernel/topology.c
+++ b/arch/arm64/kernel/topology.c
@@ -22,46 +22,6 @@
 #include <asm/cputype.h>
 #include <asm/topology.h>
 
-void store_cpu_topology(unsigned int cpuid)
-{
-       struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
-       u64 mpidr;
-
-       if (cpuid_topo->package_id != -1)
-               goto topology_populated;
-
-       mpidr = read_cpuid_mpidr();
-
-       /* Uniprocessor systems can rely on default topology values */
-       if (mpidr & MPIDR_UP_BITMASK)
-               return;
-
-       /*
-        * This would be the place to create cpu topology based on MPIDR.
-        *
-        * However, it cannot be trusted to depict the actual topology; some
-        * pieces of the architecture enforce an artificial cap on Aff0 values
-        * (e.g. GICv3's ICC_SGI1R_EL1 limits it to 15), leading to an
-        * artificial cycling of Aff1, Aff2 and Aff3 values. IOW, these end up
-        * having absolutely no relationship to the actual underlying system
-        * topology, and cannot be reasonably used as core / package ID.
-        *
-        * If the MT bit is set, Aff0 *could* be used to define a thread ID, but
-        * we still wouldn't be able to obtain a sane core ID. This means we
-        * need to entirely ignore MPIDR for any topology deduction.
-        */
-       cpuid_topo->thread_id  = -1;
-       cpuid_topo->core_id    = cpuid;
-       cpuid_topo->package_id = cpu_to_node(cpuid);
-
-       pr_debug("CPU%u: cluster %d core %d thread %d mpidr %#016llx\n",
-                cpuid, cpuid_topo->package_id, cpuid_topo->core_id,
-                cpuid_topo->thread_id, mpidr);
-
-topology_populated:
-       update_siblings_masks(cpuid);
-}
-
 #ifdef CONFIG_ACPI
 static bool __init acpi_cpu_is_threaded(int cpu)
 {

diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c
index 0424b59..0e2c6b3 100644 (file)
--- a/drivers/base/arch_topology.c
+++ b/drivers/base/arch_topology.c
@@ -841,4 +841,23 @@ void __init init_cpu_topology(void)
                return;
        }
 }
+
+void store_cpu_topology(unsigned int cpuid)
+{
+       struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
+
+       if (cpuid_topo->package_id != -1)
+               goto topology_populated;
+
+       cpuid_topo->thread_id = -1;
+       cpuid_topo->core_id = cpuid;
+       cpuid_topo->package_id = cpu_to_node(cpuid);
+
+       pr_debug("CPU%u: package %d core %d thread %d\n",
+                cpuid, cpuid_topo->package_id, cpuid_topo->core_id,
+                cpuid_topo->thread_id);
+
+topology_populated:
+       update_siblings_masks(cpuid);
+}
 #endif