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USB: DWC3: Put 100 ms delay for phy to be stable
author
Pratyush Anand
<pratyush.anand@st.com>
Thu, 21 Jun 2012 12:14:28 +0000
(17:44 +0530)
committer
Felipe Balbi
<balbi@ti.com>
Fri, 22 Jun 2012 10:21:54 +0000
(13:21 +0300)
Before taking core out of reset phy must be stable. So wait for 100ms
after clear phy reset.
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
drivers/usb/dwc3/core.c
patch
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diff --git
a/drivers/usb/dwc3/core.c
b/drivers/usb/dwc3/core.c
index
49c0602
..
ac151e9
100644
(file)
--- a/
drivers/usb/dwc3/core.c
+++ b/
drivers/usb/dwc3/core.c
@@
-148,6
+148,8
@@
static void dwc3_core_soft_reset(struct dwc3 *dwc)
reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+ mdelay(100);
+
/* After PHYs are stable we can take Core out of reset state */
reg = dwc3_readl(dwc->regs, DWC3_GCTL);
reg &= ~DWC3_GCTL_CORESOFTRESET;