mtd: rawnand: brcmnand: ECC error handling on EDU transfers

Implement ECC correctable and uncorrectable error handling for EDU
reads. If ECC correctable bitflips are encountered on EDU transfer,
read page again using PIO. This is needed due to a NAND controller
limitation where corrected data is not transferred to the DMA buffer
on ECC error. This applies to ECC correctable errors that are reported
by the controller hardware based on set number of bitflips threshold in
the controller threshold register, bitflips below the threshold are
corrected silently and are not reported by the controller hardware.

Fixes: a5d53ad26a8b ("mtd: rawnand: brcmnand: Add support for flash-edu for dma transfers")
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200612212902.21347-3-kdasu.kdev@gmail.com

diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index ac934a715a1946afcc7c6094d067776e08479a1d..a4033d32a71033c9dfe12ea9c089c67f441ecbec 100644 (file)
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -1918,6 +1918,22 @@ static int brcmnand_edu_trans(struct brcmnand_host *host, u64 addr, u32 *buf,
        edu_writel(ctrl, EDU_STOP, 0); /* force stop */
        edu_readl(ctrl, EDU_STOP);
 
+       if (!ret && edu_cmd == EDU_CMD_READ) {
+               u64 err_addr = 0;
+
+               /*
+                * check for ECC errors here, subpage ECC errors are
+                * retained in ECC error address register
+                */
+               err_addr = brcmnand_get_uncorrecc_addr(ctrl);
+               if (!err_addr) {
+                       err_addr = brcmnand_get_correcc_addr(ctrl);
+                       if (err_addr)
+                               ret = -EUCLEAN;
+               } else
+                       ret = -EBADMSG;
+       }
+
        return ret;
 }
 
@@ -2124,6 +2140,7 @@ static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip,
        u64 err_addr = 0;
        int err;
        bool retry = true;
+       bool edu_err = false;
 
        dev_dbg(ctrl->dev, "read %llx -> %p\n", (unsigned long long)addr, buf);
 
@@ -2141,6 +2158,10 @@ try_dmaread:
                        else
                                return -EIO;
                }
+
+               if (has_edu(ctrl) && err_addr)
+                       edu_err = true;
+
        } else {
                if (oob)
                        memset(oob, 0x99, mtd->oobsize);
@@ -2188,6 +2209,11 @@ try_dmaread:
        if (mtd_is_bitflip(err)) {
                unsigned int corrected = brcmnand_count_corrected(ctrl);
 
+               /* in case of EDU correctable error we read again using PIO */
+               if (edu_err)
+                       err = brcmnand_read_by_pio(mtd, chip, addr, trans, buf,
+                                                  oob, &err_addr);
+
                dev_dbg(ctrl->dev, "corrected error at 0x%llx\n",
                        (unsigned long long)err_addr);
                mtd->ecc_stats.corrected += corrected;