"true",
"Prefer likely predicted branches over selects">;
+def FeatureFastMFLR : SubtargetFeature<"fast-MFLR", "HasFastMFLR", "true",
+ "MFLR is a fast instruction">;
+
// Since new processors generally contain a superset of features of those that
// came before them, the idea is to make implementations of new processors
// less error prone and easier to read.
!listconcat(FusionFeatures, [
DirectivePwr10, FeatureISA3_1, FeaturePrefixInstrs,
FeaturePCRelativeMemops, FeatureP10Vector, FeatureMMA,
- FeaturePairedVectorMemops]);
+ FeaturePairedVectorMemops, FeatureFastMFLR]);
list<SubtargetFeature> P10SpecificFeatures = [];
list<SubtargetFeature> P10InheritableFeatures =
!listconcat(P9InheritableFeatures, P10AdditionalFeatures);
bool UsePPCPostRASchedStrategy;
bool PairedVectorMemops;
bool PredictableSelectIsExpensive;
+ bool HasFastMFLR;
bool HasModernAIXAs;
bool IsAIX;
bool hasPartwordAtomics() const { return HasPartwordAtomics; }
bool hasQuadwordAtomics() const { return HasQuadwordAtomics; }
bool hasDirectMove() const { return HasDirectMove; }
+ bool hasFastMFLR() const { return HasFastMFLR; }
Align getPlatformStackAlignment() const {
return Align(16);