uint16_t regions_count, uint64_t size,
enum iris_heap heap_flags, unsigned alloc_flags)
{
- if (unlikely(!iris_bufmgr_get_device_info(bufmgr)->mem.use_class_instance)) {
+ const struct intel_device_info *devinfo =
+ iris_bufmgr_get_device_info(bufmgr);
+ if (unlikely(!devinfo->mem.use_class_instance)) {
struct drm_i915_gem_create create_legacy = { .size = size };
assert(regions_count == 1 &&
&ext_regions.base);
if (iris_bufmgr_vram_size(bufmgr) > 0 &&
- !intel_vram_all_mappable(iris_bufmgr_get_device_info(bufmgr)) &&
+ !intel_vram_all_mappable(devinfo) &&
heap_flags == IRIS_HEAP_DEVICE_LOCAL_PREFERRED)
create.flags |= I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS;
&protected_param.base);
}
+ /* Set PAT param */
+ struct drm_i915_gem_create_ext_set_pat set_pat_param = { 0 };
+ if (devinfo->has_set_pat_uapi) {
+ set_pat_param.pat_index =
+ iris_pat_index_for_bo_flags(devinfo, alloc_flags);
+ intel_gem_add_ext(&create.extensions,
+ I915_GEM_CREATE_EXT_SET_PAT,
+ &set_pat_param.base);
+ }
+
if (intel_ioctl(iris_bufmgr_get_fd(bufmgr), DRM_IOCTL_I915_GEM_CREATE_EXT,
&create))
return 0;