drm/amd/pm: Align eccinfo table structure with smu v13_0_0 interface

Update eccinfo table structure according to smu v13_0_0 interface.

v2: Calculate array size instead of using macro definition.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 4dd01b3f350ff4206f138e35619d63e20776ddfb..a6083957ae51b531896bc582b7b77269e3cb8cb7 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -46,7 +46,6 @@
 #include "asic_reg/mp/mp_13_0_0_sh_mask.h"
 #include "smu_cmn.h"
 #include "amdgpu_ras.h"
-#include "umc_v8_10.h"
 
 /*
  * DO NOT use these for err/warn/info/debug messages.
@@ -2609,7 +2608,7 @@ static ssize_t smu_v13_0_0_get_ecc_info(struct smu_context *smu,
 
        ecc_table = (EccInfoTable_t *)smu_table->ecc_table;
 
-       for (i = 0; i < UMC_V8_10_TOTAL_CHANNEL_NUM(adev); i++) {
+       for (i = 0; i < ARRAY_SIZE(ecc_table->EccInfo); i++) {
                ecc_info_per_channel = &(eccinfo->ecc[i]);
                ecc_info_per_channel->ce_count_lo_chip =
                                ecc_table->EccInfo[i].ce_count_lo_chip;