ARM: dts: armada-38x: Fix assigned-addresses for every PCIe Root Port
authorPali Rohár <pali@kernel.org>
Wed, 17 Aug 2022 22:30:52 +0000 (00:30 +0200)
committerGregory CLEMENT <gregory.clement@bootlin.com>
Sun, 27 Nov 2022 23:55:14 +0000 (00:55 +0100)
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port
(PCI-to-PCI bridge) should match BDF in address part in that DT node name
as specified resource belongs to Marvell PCIe Root Port itself.

Fixes: 0d3d96ab0059 ("ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
arch/arm/boot/dts/armada-380.dtsi
arch/arm/boot/dts/armada-385.dtsi

index ce1dddb..e94f22b 100644 (file)
@@ -89,7 +89,7 @@
                        /* x1 port */
                        pcie@2,0 {
                                device_type = "pci";
-                               assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
+                               assigned-addresses = <0x82001000 0 0x40000 0 0x2000>;
                                reg = <0x1000 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                        /* x1 port */
                        pcie@3,0 {
                                device_type = "pci";
-                               assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
+                               assigned-addresses = <0x82001800 0 0x44000 0 0x2000>;
                                reg = <0x1800 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
index 83392b9..be8d607 100644 (file)
@@ -93,7 +93,7 @@
                        /* x1 port */
                        pcie2: pcie@2,0 {
                                device_type = "pci";
-                               assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
+                               assigned-addresses = <0x82001000 0 0x40000 0 0x2000>;
                                reg = <0x1000 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                        /* x1 port */
                        pcie3: pcie@3,0 {
                                device_type = "pci";
-                               assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
+                               assigned-addresses = <0x82001800 0 0x44000 0 0x2000>;
                                reg = <0x1800 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                         */
                        pcie4: pcie@4,0 {
                                device_type = "pci";
-                               assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
+                               assigned-addresses = <0x82002000 0 0x48000 0 0x2000>;
                                reg = <0x2000 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;