net: hns3: do not return GE PFC setting err when initializing

GE MAC does not support PFC, when driver is initializing and MAC
is in GE Mode, ignore the fw not supported error, otherwise
initialization will fail.

Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
index 5f7ac63707b80ca5945e8f3e8784d2a71f0c16e6..7db491086feaaaca252953b9d28a35f4029d4d99 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
@@ -166,7 +166,7 @@ static int hclge_map_update(struct hnae3_handle *h)
        if (ret)
                return ret;
 
-       ret = hclge_pause_setup_hw(hdev);
+       ret = hclge_pause_setup_hw(hdev, false);
        if (ret)
                return ret;
 
@@ -313,7 +313,7 @@ static int hclge_ieee_setpfc(struct hnae3_handle *h, struct ieee_pfc *pfc)
 
        hdev->tm_info.hw_pfc_map = pfc_map;
 
-       return hclge_pause_setup_hw(hdev);
+       return hclge_pause_setup_hw(hdev, false);
 }
 
 /* DCBX configuration */
@@ -361,7 +361,7 @@ static int hclge_setup_tc(struct hnae3_handle *h, u8 tc, u8 *prio_tc)
        hclge_tm_schd_info_update(hdev, tc);
        hclge_tm_prio_tc_info_update(hdev, prio_tc);
 
-       ret = hclge_tm_init_hw(hdev);
+       ret = hclge_tm_init_hw(hdev, false);
        if (ret)
                return ret;
 

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 3ba8de93bc3d93abdd17bed5a8cbc0f8dc0b5d54..6fb3144eb79dd7ebc72979710c21d3d7c35329fd 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -7428,7 +7428,7 @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev)
                return ret;
        }
 
-       ret = hclge_tm_init_hw(hdev);
+       ret = hclge_tm_init_hw(hdev, true);
        if (ret) {
                dev_err(&pdev->dev, "tm init hw fail, ret =%d\n", ret);
                return ret;

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
index d057c9f03175ecbb974c933f0d9af7646878c9e2..44316602c2fcb37f1d34b7b4150ebd271cbb5322 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
@@ -1255,7 +1255,7 @@ static int hclge_tm_bp_setup(struct hclge_dev *hdev)
        return ret;
 }
 
-int hclge_pause_setup_hw(struct hclge_dev *hdev)
+int hclge_pause_setup_hw(struct hclge_dev *hdev, bool init)
 {
        int ret;
 
@@ -1271,10 +1271,15 @@ int hclge_pause_setup_hw(struct hclge_dev *hdev)
        if (!hnae3_dev_dcb_supported(hdev))
                return 0;
 
-       /* When MAC is GE Mode, hdev does not support pfc setting */
+       /* GE MAC does not support PFC, when driver is initializing and MAC
+        * is in GE Mode, ignore the error here, otherwise initialization
+        * will fail.
+        */
        ret = hclge_pfc_setup_hw(hdev);
-       if (ret)
-               dev_warn(&hdev->pdev->dev, "set pfc pause failed:%d\n", ret);
+       if (init && ret == -EOPNOTSUPP)
+               dev_warn(&hdev->pdev->dev, "GE MAC does not support pfc\n");
+       else
+               return ret;
 
        return hclge_tm_bp_setup(hdev);
 }
@@ -1314,7 +1319,7 @@ void hclge_tm_schd_info_update(struct hclge_dev *hdev, u8 num_tc)
        hclge_tm_schd_info_init(hdev);
 }
 
-int hclge_tm_init_hw(struct hclge_dev *hdev)
+int hclge_tm_init_hw(struct hclge_dev *hdev, bool init)
 {
        int ret;
 
@@ -1326,7 +1331,7 @@ int hclge_tm_init_hw(struct hclge_dev *hdev)
        if (ret)
                return ret;
 
-       ret = hclge_pause_setup_hw(hdev);
+       ret = hclge_pause_setup_hw(hdev, init);
        if (ret)
                return ret;
 
@@ -1345,7 +1350,7 @@ int hclge_tm_schd_init(struct hclge_dev *hdev)
        if (ret)
                return ret;
 
-       return hclge_tm_init_hw(hdev);
+       return hclge_tm_init_hw(hdev, true);
 }
 
 int hclge_tm_vport_map_update(struct hclge_dev *hdev)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
index ef3f93b70c22bed57eefa2b9a7285e48278590e6..f60e540c7a6246a6caf867c3f3b6fe07424bbf40 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h
@@ -143,12 +143,12 @@ struct hclge_port_shapping_cmd {
 
 int hclge_tm_schd_init(struct hclge_dev *hdev);
 int hclge_tm_vport_map_update(struct hclge_dev *hdev);
-int hclge_pause_setup_hw(struct hclge_dev *hdev);
+int hclge_pause_setup_hw(struct hclge_dev *hdev, bool init);
 int hclge_tm_schd_setup_hw(struct hclge_dev *hdev);
 void hclge_tm_prio_tc_info_update(struct hclge_dev *hdev, u8 *prio_tc);
 void hclge_tm_schd_info_update(struct hclge_dev *hdev, u8 num_tc);
 int hclge_tm_dwrr_cfg(struct hclge_dev *hdev);
-int hclge_tm_init_hw(struct hclge_dev *hdev);
+int hclge_tm_init_hw(struct hclge_dev *hdev, bool init);
 int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx);
 int hclge_pause_addr_cfg(struct hclge_dev *hdev, const u8 *mac_addr);
 int hclge_pfc_rx_stats_get(struct hclge_dev *hdev, u64 *stats);